| FPGA HLS today: Successes, challenges, and opportunities J Cong, J Lau, G Liu, S Neuendorffer, P Pan, K Vissers, Z Zhang TRETS: ACM Transactions on Reconfigurable Technology and Systems 15 (4), 1 …, 2022 | 146 | 2022 |
| AutoBridge: Coupling coarse-grained floorplanning and pipelining for high-frequency HLS design on multi-die FPGAs L Guo, Y Chi, J Wang, J Lau, W Qiao, E Ustun, Z Zhang, J Cong FPGA '21: The 2021 ACM/SIGDA International Symposium on Field-Programmable …, 2021 | 98* | 2021 |
| Hardware acceleration of long read pairwise overlapping in genome sequencing: A race between FPGA and GPU L Guo*, J Lau*, Z Ruan, P Wei, J Cong FCCM 19: 2019 IEEE 27th Annual International Symposium on Field-Programmable …, 2019 | 90 | 2019 |
| Sextans: A streaming accelerator for general-purpose sparse-matrix dense-matrix multiplication L Song, Y Chi, A Sohrabizadeh, Y Choi, J Lau, J Cong FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable …, 2022 | 76* | 2022 |
| Extending high-level synthesis for task-parallel programs Y Chi, L Guo, J Lau, Y Choi, J Wang, J Cong FCCM '21: 2021 IEEE 29th Annual International Symposium on Field …, 2021 | 62 | 2021 |
| CHARM: Composing heterogeneous accelerators for matrix multiply on Versal ACAP architecture J Zhuang, J Lau, H Ye, Z Yang, Y Du, J Lo, K Denolf, S Neuendorffer, ... FPGA '23: The 2023 ACM/SIGDA International Symposium on Field Programmable …, 2023 | 49 | 2023 |
| Analysis and optimization of the implicit broadcasts in FPGA HLS to improve maximum frequency L Guo*, J Lau*, Y Chi, J Wang, CH Yu, Z Chen, Z Zhang, J Cong DAC '20: 2020 57th ACM/IEEE Design Automation Conference, 1-6, 2020 | 42* | 2020 |
| Analysis and optimization of the implicit broadcasts in FPGA HLS to improve maximum frequency (Poster) L Guo*, J Lau*, Y Chi, J Wang, CH Yu, Z Chen, Z Zhang, J Cong FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable …, 2020 | 30* | 2020 |
| TAPA: A scalable task-parallel dataflow programming framework for modern FPGAs with co-optimization of HLS and physical design L Guo*, Y Chi*, J Lau*, L Song, X Tian, M Khatti, W Qiao, J Wang, E Ustun, ... TRETS: ACM Transactions on Reconfigurable Technology and Systems 16 (4), 1 …, 2023 | 26* | 2023 |
| HeteroRefactor: Refactoring for heterogeneous computing with FPGA J Lau*, A Sivaraman*, Q Zhang*, MA Gulzar, J Cong, M Kim ICSE '20: 2020 IEEE/ACM 42nd International Conference on Software …, 2020 | 23 | 2020 |
| RapidStream 2.0: Automated parallel implementation of latency insensitive FPGA designs through partial reconfiguration L Guo, P Maidee, Y Zhou, C Lavin, E Hung, W Li, J Lau, W Qiao, Y Chi, ... TRETS: ACM Transactions on Reconfigurable Technology and Systems 16 (4), 1 …, 2023 | 16* | 2023 |
| TARO: Automatic optimization for free-running kernels in FPGA high-level synthesis Y Choi, Y Chi, J Lau, J Cong TCAD: IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 5 | 2022 |
| CHARM 2.0: Composing heterogeneous accelerators for deep learning on Versal ACAP architecture J Zhuang, J Lau, H Ye, Z Yang, S Ji, J Lo, K Denolf, S Neuendorffer, ... TRETS: ACM Transactions on Reconfigurable Technology and Systems 17 (3), 1 …, 2024 | 3 | 2024 |
| Enabling heterogeneous computing for software developers J Lau University of California, Los Angeles, 2024 | | 2024 |
| RapidStream IR: Infrastructure for FPGA high-level physical synthesis J Lau, Y Xiao, Y Xie, Y Chi, L Song, S Xiang, M Lo, Z Zhang, J Cong, ... ICCAD '24: 2024 ACM/IEEE International Conference On Computer Aided Design, 2024 | | 2024 |
| Student cluster competition 2017, team Tsinghua University: Reproducing vectorization of the tersoff multi-body potential on the Intel Skylake and NVIDIA Volta architectures J Lau, Y Li, L Xie, Q Xie, B Li, Y Chen, G Feng, J Yu, X Yu, M Wang, ... Parallel Computing 78, 47-53, 2018 | | 2018 |
Jingsheng Jason CongVolgenau Chair for Engineering Excellence, Computer Science and Electrical Engineering, Universityبريد إلكتروني تم التحقق منه على cs.ucla.edu
