متابعة
Vinay C Patil
Vinay C Patil
بريد إلكتروني تم التحقق منه على umass.edu
عنوان
عدد مرات الاقتباسات
عدد مرات الاقتباسات
السنة
Physical design obfuscation of hardware: A comprehensive investigation of device and logic-level techniques
A Vijayakumar, VC Patil, DE Holcomb, C Paar, S Kundu
IEEE Transactions on Information Forensics and Security 12 (1), 64-77, 2016
1282016
Machine learning resistant strong PUF: Possible or a pipe dream?
A Vijayakumar, VC Patil, CB Prado, S Kundu
2016 IEEE international symposium on hardware oriented security and trust …, 2016
1142016
On improving reliability of SRAM-based physically unclonable functions
A Vijayakumar, VC Patil, S Kundu
Journal of Low Power Electronics and Applications 7 (1), 2, 2017
482017
Preventing DNN model IP theft via hardware obfuscation
BF Goldstein, VC Patil, VC Ferreira, AS Nery, FMG França, S Kundu
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (2 …, 2021
372021
On design of temperature invariant physically unclonable functions based on ring oscillators
R Kumar, VC Patil, S Kundu
2012 IEEE Computer Society Annual Symposium on VLSI, 165-170, 2012
372012
Realizing strong PUF from weak PUF via neural computing
L Santiago, VC Patil, CB Prado, TAO Alves, LAJ Marzulo, FMG França, ...
2017 IEEE international symposium on defect and fault tolerance in VLSI and …, 2017
342017
On Enhancing Reliability of Weak PUFs via Intelligent Post-Silicon Accelerated Aging
MN Islam, VC Patil, S Kundu
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (3), 960-969, 2018
222018
Design of unique and reliable physically unclonable functions based on current starved inverter chain
R Kumar, VC Patil, S Kundu
2011 IEEE Computer Society Annual Symposium on VLSI, 224-229, 2011
202011
Improving reliability of weak PUFs via circuit techniques to enhance mismatch
VC Patil, A Vijayakumar, DE Holcomb, S Kundu
2017 IEEE International Symposium on Hardware Oriented Security and Trust …, 2017
182017
Determining proximal geolocation of IoT edge devices via covert channel
MN Islam, VC Patil, S Kundu
2017 18th International Symposium on Quality Electronic Design (ISQED), 196-202, 2017
132017
An efficient method for clock skew scheduling to reduce peak current
A Vijayakumar, VC Patil, S Kundu
2016 29th International Conference on VLSI Design and 2016 15th …, 2016
132016
On testing physically unclonable functions for uniqueness
A Vijayakumar, VC Patil, S Kundu
2016 17th International symposium on quality electronic design (ISQED), 368-373, 2016
122016
Realizing robust, lightweight strong PUFs for securing smart grids
VC Patil, S Kundu
IEEE Transactions on Consumer Electronics 68 (1), 5-13, 2021
112021
A guide to graceful aging: How not to overindulge in post-silicon burn-in for enhancing reliability of weak PUF
MN Islam, VC Patil, S Kundu
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
102017
Design of robust, high-entropy strong PUFs via weightless neural network
L Santiago de Araújo, V C. Patil, C B. Prado, T AO Alves, L AJ Marzulo, ...
Journal of Hardware and Systems Security 3, 235-249, 2019
92019
Peer pressure on identity: On requirements for disambiguating PUFs in noisy environment
P Ramesh, VC Patil, S Kundu
2017 IEEE North Atlantic test workshop (NATW), 1-4, 2017
82017
On leveraging multi-threshold FinFETs for design obfuscation
VC Patil, S Kundu
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 108-113, 2020
62020
On pattern generation for maximizing IR drop
A Vijayakumar, VC Patil, G Paladugu, S Kundu
Fifteenth International Symposium on Quality Electronic Design, 731-737, 2014
62014
Combination frequency differencing for identifying design weaknesses in physical unclonable functions
DR Kuhn, MS Raunak, C Prado, VC Patil, RN Kacker
2022 IEEE International Conference on Software Testing, Verification and …, 2022
52022
Manufacturer turned attacker: Dangers of stealthy trojans via threshold voltage manipulation
VC Patil, A Vijayakumar, S Kundu
2017 IEEE North Atlantic Test Workshop (NATW), 1-6, 2017
52017
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مقالات 1–20