متابعة
Ilia Polian
Ilia Polian
University of Stuttgart
بريد إلكتروني تم التحقق منه على polian.de - الصفحة الرئيسية
عنوان
عدد مرات الاقتباسات
عدد مرات الاقتباسات
السنة
A definition and classification of timing anomalies‏
J Reineke, B Wachter, S Thesing, R Wilhelm, I Polian, J Eisinger, ...‏
6th International Workshop on Worst-Case Execution Time Analysis (WCET'06 …, 2006‏
2882006
A family of logical fault models for reversible circuits‏
I Polian, T Fiehn, B Becker, JP Hayes‏
14th Asian Test Symposium (ATS'05), 422-427, 2005‏
1542005
Testing for missing-gate faults in reversible circuits‏
JP Hayes, I Polian, B Becker‏
13th Asian test symposium, 100-105, 2004‏
1442004
X-masking during logic BIST and its impact on defect coverage‏
Y Tang, HJ Wunderlich, H Vranken, F Hapke, M Wittke, P Engelke, ...‏
2004 International Conferce on Test, 442-451, 2004‏
1322004
Fault-tolerant, high-level quantum circuits: form, compilation and description‏
A Paler, I Polian, K Nemoto, SJ Devitt‏
Quantum Science and Technology 2 (2), 025003, 2017‏
1062017
Simulating resistive-bridging and stuck-at faults‏
P Engelke, I Polian, M Renovell, B Becker‏
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006‏
1052006
Parametric trojans for fault-injection attacks on cryptographic hardware‏
R Kumar, P Jovanovic, W Burleson, I Polian‏
2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, 18-28, 2014‏
942014
A fault attack on the LED block cipher‏
P Jovanovic, M Kreuzer, I Polian‏
Constructive Side-Channel Analysis and Secure Design: Third International …, 2012‏
912012
Benchmarking the performance of portfolio optimization with QAOA‏
S Brandhofer, D Braun, V Dehn, G Hellstern, M Hüls, Y Ji, I Polian, ...‏
Quantum Information Processing 22 (1), 25, 2022‏
832022
Adaptive voltage over-scaling for resilient applications‏
PK Krause, I Polian‏
2011 Design, Automation & Test in Europe, 1-6, 2011‏
832011
An analysis framework for transient-error tolerance‏
JP Hayes, I Polian, B Becker‏
25th IEEE VLSI Test Symposium (VTS'07), 249-255, 2007‏
782007
Selective hardening: Toward cost-effective error tolerance‏
I Polian, JP Hayes‏
IEEE Design & Test of Computers 28 (3), 54-63, 2010‏
742010
Analysis and optimization of fault-tolerant embedded systems with hardened processors‏
V Izosimov, I Polian, P Pop, P Eles, Z Peng‏
2009 Design, Automation & Test in Europe Conference & Exhibition, 682-687, 2009‏
742009
Power droop testing‏
I Polian, A Czutro, S Kundu, B Becker‏
2006 International Conference on Computer Design, 243-250, 2006‏
722006
A simulator of small-delay faults caused by resistive-open defects‏
A Czutro, N Houarche, P Engelke, I Polian, M Comte, M Renovell, ...‏
2008 13th European Test Symposium, 113-118, 2008‏
702008
Functional constraints vs. test compression in scan-based delay testing‏
I Polian, H Fujiwara‏
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006‏
652006
Small-delay-fault ATPG with waveform accuracy‏
M Sauer, A Czutro, I Polian, B Becker‏
Proceedings of the International Conference on Computer-Aided Design, 30-36, 2012‏
622012
Resistive bridge fault model evolution from conventional to ultra deep submicron‏
I Polian, P Engelke, B Becker, S Kundu, JM Galliere, M Renovell‏
23rd IEEE VLSI Test Symposium (VTS'05), 343-348, 2005‏
592005
Automatic test pattern generation for interconnect open defects‏
S Spinner, I Polian, P Engelke, B Becker, M Keim, WT Cheng‏
26th IEEE VLSI test symposium (vts 2008), 181-186, 2008‏
582008
Building a better random number generator for stochastic computing‏
F Neugebauer, I Polian, JP Hayes‏
2017 Euromicro Conference on Digital System Design (DSD), 1-8, 2017‏
572017
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مقالات 1–20