Active disk meets flash: A case for intelligent ssds S Cho, C Park, H Oh, S Kim, Y Yi, GR Ganger Proceedings of the 27th international ACM conference on International …, 2013 | 165 | 2013 |
A static scheduling heuristic for heterogeneous processors H Oh, S Ha Euro-Par'96 Parallel Processing: Second International Euro-Par Conference …, 1996 | 158 | 1996 |
Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints H Oh, S Ha Proceedings of the tenth international symposium on Hardware/software …, 2002 | 117 | 2002 |
A task remapping technique for reliable multi-core embedded systems C Lee, H Kim, H Park, S Kim, H Oh, S Ha Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2010 | 103 | 2010 |
Fast, energy efficient scan inside flash memory SSDs S Kim, H Oh, C Park, S Cho, SW Lee Proceeedings of the International Workshop on Accelerating Data Management …, 2011 | 84 | 2011 |
vcnn: Verifiable convolutional neural network based on zk-snarks S Lee, H Ko, J Kim, H Oh IEEE Transactions on Dependable and Secure Computing, 2024 | 81 | 2024 |
A cross-layer approach for power-performance optimization in distributed mobile systems S Mohapatra, R Cornea, H Oh, K Lee, M Kim, N Dutt, R Gupta, A Nicolau, ... 19th IEEE International Parallel and Distributed Processing Symposium, 8 pp., 2005 | 79 | 2005 |
In-storage processing of database scans and joins S Kim, H Oh, C Park, S Cho, SW Lee, B Moon Information Sciences 327, 183-200, 2016 | 71 | 2016 |
The role of user resistance in the adoption of a mobile data service C Sanford, H Oh Cyberpsychology, Behavior, and Social Networking 13 (6), 663-672, 2010 | 68 | 2010 |
Executing synchronous dataflow graphs on a SPM-based multicore architecture J Choi, H Oh, S Kim, S Ha Proceedings of the 49th Annual Design Automation Conference, 664-671, 2012 | 67 | 2012 |
Minimizing buffer requirements for throughput constrained parallel execution of synchronous dataflow graph T Shin, H Oh, S Ha 16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 165-170, 2011 | 67 | 2011 |
A hardware-software cosynthesis technique based on heterogeneous multiprocessor scheduling H Oh, S Ha Proceedings of the seventh international workshop on Hardware/software …, 1999 | 63 | 1999 |
Fractional rate dataflow model for efficient code synthesis H Oh, S Ha Journal of VLSI signal processing systems for signal, image and video …, 2004 | 61 | 2004 |
Intelligent SSD: a turbo for big data mining DH Bae, JH Kim, SW Kim, H Oh, C Park Proceedings of the 22nd ACM international conference on Information …, 2013 | 55 | 2013 |
Multiprocessor SoC design methods and tools HW Park, H Oh, S Ha IEEE Signal Processing Magazine 26 (6), 72-79, 2009 | 46 | 2009 |
Fractional rate dataflow model and efficient code synthesis for multimedia applications H Oh, S Ha Proceedings of the joint conference on Languages, compilers and tools for …, 2002 | 46 | 2002 |
Dynamic behavior specification and dynamic mapping for real-time embedded systems: Hopes approach H Jung, C Lee, SH Kang, S Kim, H Oh, S Ha ACM Transactions on Embedded Computing Systems (TECS) 13 (4s), 1-26, 2014 | 40 | 2014 |
Succinct zero-knowledge batch proofs for set accumulators M Campanelli, D Fiore, S Han, J Kim, D Kolonelos, H Oh Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications …, 2022 | 36 | 2022 |
A novel analytical method for worst case response time estimation of distributed embedded systems J Kim, H Oh, J Choi, H Ha, S Ha Proceedings of the 50th Annual Design Automation Conference, 1-10, 2013 | 34 | 2013 |
vCNN: Verifiable Convolutional Neural Network. S Lee, H Ko, J Kim, H Oh IACR Cryptol. ePrint Arch. 2020, 584, 2020 | 33 | 2020 |