A compiler framework for extracting superword level parallelism J Liu, Y Zhang, O Jang, W Ding, M Kandemir Proceedings of the 33rd ACM SIGPLAN Conference on Programming Language …, 2012 | 79 | 2012 |
Panacea: Towards holistic optimization of MapReduce applications J Liu, N Ravi, S Chakradhar, M Kandemir Proceedings of the Tenth International Symposium on Code Generation and …, 2012 | 33 | 2012 |
Optimizing data layouts for parallel computation on multicores Y Zhang, W Ding, J Liu, M Kandemir 2011 International Conference on Parallel Architectures and Compilation …, 2011 | 31 | 2011 |
On-chip cache hierarchy-aware tile scheduling for multicore machines J Liu, Y Zhang, W Ding, M Kandemir International Symposium on Code Generation and Optimization (CGO 2011), 161-170, 2011 | 31 | 2011 |
Computer-guided holistic optimization of MapReduce applications N Ravi, J Liu, ST Chakradhar US Patent 8,793,674, 2014 | 28 | 2014 |
A data layout optimization framework for nuca-based multicores Y Zhang, W Ding, M Kandemir, J Liu, O Jang Proceedings of the 44th Annual IEEE/ACM International Symposium on …, 2011 | 27 | 2011 |
Network footprint reduction through data access and computation placement in noc-based manycores J Liu, J Kotra, W Ding, M Kandemir Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 22 | 2015 |
Neighborhood-aware data locality optimization for NoC-based multicores M Kandemir, Y Zhang, J Liu, T Yemliha International Symposium on Code Generation and Optimization (CGO 2011), 191-200, 2011 | 20 | 2011 |
Software-directed data access scheduling for reducing disk energy consumption Y Zhang, J Liu, E Wilson, M Kandemir Proceedings of the 20th international symposium on High performance …, 2011 | 12 | 2011 |
A modular fast simulation framework for stream-oriented MPSoC K Huang, I Bacivarov, J Liu, W Haid 2009 IEEE International Symposium on Industrial Embedded Systems, 74-81, 2009 | 12 | 2009 |
Scalable parallelization strategies to accelerate NuFFT data translation on multicores Y Zhang, J Liu, E Kultursay, M Kandemir, N Pitsianis, X Sun Euro-Par 2010-Parallel Processing: 16th International Euro-Par Conference …, 2010 | 11 | 2010 |
Data layout optimization for GPGPU architectures J Liu, W Ding, O Jang, M Kandemir ACM SIGPLAN Notices 48 (8), 283-284, 2013 | 8 | 2013 |
Reshaping cache misses to improve row-buffer locality in multicore systems W Ding, J Liu, M Kandemir, MJ Irwin Proceedings of the 22nd International Conference on Parallel Architectures …, 2013 | 7 | 2013 |
Automatic parallel code generation for nuFFT data translation on multicores Y Zhang, J Liu, E Kultursay, M Kandemir, N Pitsianis, X Sun Journal of Circuits, Systems, and Computers 21 (02), 1240004, 2012 | 4 | 2012 |
Optimizing data locality using array tiling W Ding, Y Zhang, J Liu, M Kandemir 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 142-149, 2011 | 2 | 2011 |
A modular trace-based simulation framework for multiprocessor systems J Liu Master’s thesis, ETH Zurich, 2007 | 1 | 2007 |
BrickX: building hybrid systems for recursive computations Y Zhang, J Liu, SP Muralidhara, M Kandemir ACM SIGMETRICS Performance Evaluation Review 39 (3), 98-100, 2011 | | 2011 |
Scheduling Mechanisms in High-Level Simulation Framework J LIU, Z LI, I Bacivarov, K HUANG Microelectronics & Computer, 2008 | | 2008 |