Следене
Abhijit Das
Abhijit Das
Director of Research, UPC BarcelonaTech
Потвърден имейл адрес: upc.edu - Начална страница
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SECTAR: Secure NoC using trojan aware routing
R Manju, A Das, J Jose, P Mishra
2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 1-8, 2020
412020
Critical packet prioritisation by slack-aware re-routing in on-chip networks
A Das, S Babu, J Jose, S Jose, M Palesi
2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS), 1-8, 2018
152018
Loki: a hardware trojan affecting multiple components of an soc
M Rajan, A Das, J Jose
2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 176-181, 2022
82022
Revising NOC in future multicore-based consumer electronics for performance
A Das, A Kumar, J Jose, M Palesi
IEEE Consumer Electronics Magazine 11 (3), 79-86, 2021
82021
Implementation and analysis of hotspot mitigation in mesh NoCs by cost-effective deflection routing technique
RSR Raj, A Das, J Jose
2017 IFIP/IEEE International Conference on Very Large Scale Integration …, 2017
82017
Multi-objective hardware-mapping co-optimisation for multi-DNN workloads on chiplet-based accelerators
A Das, E Russo, M Palesi
IEEE Transactions on Computers, 2024
72024
Opportunistic caching in noc: exploring ways to reduce miss penalty
A Das, A Kumar, J Jose, M Palesi
IEEE Transactions on Computers 70 (6), 892-905, 2021
62021
Chip and package-scale interconnects for general-purpose, domain-specific and quantum computing systems-overview, challenges and opportunities
A Das, M Palesi, J Kim, PP Pande
IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2024
52024
Trojan aware network-on-chip routing
M Rajan, A Das, J Jose, P Mishra
Network-on-chip security and privacy, 277-307, 2021
52021
Reducing off-chip miss penalty by exploiting underutilised on-chip router buffers
A Das, A Kumar, J Jose
2020 IEEE 38th International Conference on Computer Design (ICCD), 230-238, 2020
52020
Exploiting on-chip routers to store dirty cache blocks in tiled chip multi-processors
A Das, A Kumar, J Jose, M Palesi
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 147-152, 2020
52020
John Jose, Prabhat Mishra, SECTAR: Secure NoC using Trojan Aware Routing
R Manju, A Das
IEEE/ACM International Symposium on Networks-on-Chip, NOCS, 1-8, 2020
52020
An adaptive deflection router with dual injection and ejection units for mesh NoCs
J Jose, A Das
2018 31st International Conference on VLSI Design and 2018 17th …, 2018
52018
Wireless enabled Inter-Chiplet Communication in DNN Hardware Accelerators
M Palesi, E Russo, A Das, J Jose
2023 IEEE International Parallel and Distributed Processing Symposium …, 2023
32023
Data criticality in multithreaded applications: An insight for many-core systems
A Das, J Jose, P Mishra
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (9 …, 2021
32021
WiBS: A Modular and Scalable Wireless Infrastructure in a Cycle-Accurate NoC Simulator
M Saha, A Das, J Jose
2022 15th IEEE/ACM International Workshop on Network on Chip Architectures …, 2022
22022
III-V semiconductor nanowires and nanopillar arrays for an Insect Vision Inspired Neuromorphic On-Chip Platform
J Azevedo, A Das, B Jacob, V Flodgren, JB Nieder, A Mikkelsen, ...
2024 IEEE Photonics Conference (IPC), 1-2, 2024
12024
Communication characterization of ai workloads for large-scale multi-chiplet accelerators
M Musavi, E Irabor, A Das, E Alarcon, S Abadal
arXiv preprint arXiv:2410.22262, 2024
12024
Designing Data-Aware Network-on-Chip for Performance
A Das, J Jose
2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 428-433, 2022
12022
Adaptive packet throttling technique for congestion management in mesh nocs
NS Aswathy, RSR Raj, A Das, J Jose, VR Josna
International Symposium on VLSI Design and Test, 337-344, 2017
12017
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