| Dual: Acceleration of clustering algorithms using digital-based processing in-memory M Imani, S Pampana, S Gupta, M Zhou, Y Kim, T Rosing 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020 | 103 | 2020 |
| TransPIM: A memory-based acceleration via software-hardware co-design for transformer M Zhou, W Xu, J Kang, T Rosing 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 98 | 2022 |
| Gram: graph processing in a reram-based computational memory M Zhou, M Imani, S Gupta, Y Kim, T Rosing IEEE Asia and South Pacific Design Automation Conference, 2019 | 42 | 2019 |
| Relhd: A graph-based learning on fefet with hyperdimensional computing J Kang, M Zhou, A Bhansali, W Xu, A Thomas, T Rosing 2022 IEEE 40th International Conference on Computer Design (ICCD), 553-560, 2022 | 28 | 2022 |
| Digitalpim: Digital-based processing in-memory for big data acceleration M Imani, S Gupta, Y Kim, M Zhou, T Rosing Proceedings of the 2019 Great Lakes Symposium on VLSI, 429-434, 2019 | 28 | 2019 |
| Gas: A heterogeneous memory architecture for graph processing M Zhou, M Imani, S Gupta, T Rosing Proceedings of the International Symposium on Low Power Electronics and …, 2018 | 18 | 2018 |
| HR3AM: A Heat Resilient Design for RRAM-based Neuromorphic Computing X Liu, M Zhou, TS Rosing, J Zhao 2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019 | 13 | 2019 |
| Thermal-aware design and management for search-based in-memory acceleration M Zhou, M Imani, S Gupta, T Rosing Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 11 | 2019 |
| PIMProf: An automated program profiler for processing-in-memory offloading decisions Y Wei, M Zhou, S Liu, K Seemakhupt, T Rosing, S Khan 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 855-860, 2022 | 10 | 2022 |
| Hygraph: Accelerating graph processing with hybrid memory-centric computing M Zhou, M Li, M Imani, T Rosing 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 330-335, 2021 | 10 | 2021 |
| Ultra efficient acceleration for de novo genome assembly via near-memory computing M Zhou, L Wu, M Li, N Moshiri, K Skadron, T Rosing 2021 30th International Conference on Parallel Architectures and Compilation …, 2021 | 9 | 2021 |
| Temperature-aware dram cache management—relaxing thermal constraints in 3-d systems M Zhou, A Prodromou, R Wang, H Yang, D Qian, D Tullsen IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 9 | 2019 |
| Data layout optimization on processing in memory architecture for executing neural network model Z Minxuan, C Guoyang, W Zhang US Patent 11,669,443, 2023 | 8 | 2023 |
| MAT: Processing in-memory acceleration for long-sequence attention M Zhou, Y Guo, W Xu, B Li, KW Eliceiri, T Rosing 2021 58th ACM/IEEE Design Automation Conference (DAC), 25-30, 2021 | 8 | 2021 |
| Dp-sim: A full-stack simulation infrastructure for digital processing in-memory architectures M Zhou, M Imani, Y Kim, S Gupta, T Rosing Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021 | 8 | 2021 |
| Efficient machine learning on encrypted data using hyperdimensional computing Y Nam, M Zhou, S Gupta, G De Micheli, R Cammarota, C Wilkerson, ... 2023 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2023 | 7 | 2023 |
| Pim-dl: Boosting dnn inference on digital processing in-memory architectures via data layout optimizations M Zhou, G Chen, M Imani, S Gupta, W Zhang, T Rosing 2021 30th International Conference on Parallel Architectures and Compilation …, 2021 | 6 | 2021 |
| FPRA: A fine-grained parallel RRAM architecture X Liu, M Zhou, R Ausavarungnirun, S Eilert, A Akel, T Rosing, ... 2021 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2021 | 4 | 2021 |
| HV2M: a novel approach to boost inter-VM network performance for Xen-based HVMs K Cheng, Y Bai, Y Zhao, Y Ma, D Lu, Y Peng, M Zhou Journal of Systems and Software 114, 54-68, 2016 | 4 | 2016 |
| Data layout conscious processing in memory architecture for executing neural network model Z Minxuan, W Zhang, C Guoyang US Patent 12,205,019, 2025 | 2 | 2025 |