| Power reduction of a functional unit using rt-level clock-gating and operand isolation R Samanth, CVS Chaitanya, GS Nayak 2019 IEEE International Conference on Distributed Computing, VLSI …, 2019 | 9 | 2019 |
| A Novel Multiply-Accumulator Unit Bus Encoding Architecture for Image Processing Applications. R Samanth, SG Nayak, PB Nempu Iranian Journal of Electrical & Electronic Engineering 19 (1), 2023 | 3 | 2023 |
| VLSI design techniques for low power MAC unit: A review AK Sahu, R Samanth, T Mendez, SG Nayak, KV Kedlaya AIP Conference Proceedings 2358 (1), 2021 | 2 | 2021 |
| A novel approach to develop low power MACs for 2D image filtering R Samanth, V Kedlaya, SG Nayak IEEE Access 9, 28421-28428, 2021 | 2 | 2021 |
| Design and Implementation of 32-bit Functional Unit for RISC architecture applications R Samanth, A Amin, SG Nayak 2020 5th International Conference on Devices, Circuits and Systems (ICDCS …, 2020 | 2 | 2020 |
| Design and sv based verification of AMBA AXI protocol for SoC integration R Samanth, SG Nayak International Journal of Recent Technology and Engineering 8 (2), 1465-1469, 2019 | 2 | 2019 |
| Design and analysis of four port router for network-on-chip applications R Samanth, SG Nayak Journal of Physics: Conference Series 2571 (1), 012032, 2023 | 1 | 2023 |
| Modified illumination invariant algorithm based human face detection MK Kaushik, R Samanth, SG Nayak International Journal of Scientific and Technology Research 9 (4), 592-595, 2020 | 1 | 2020 |
| Novel Design of Ripple Carry Adder using High Speed 12T Hybrid MOS Transistors D Venkat, T Mendez, R Samanth, SG Nayak Journal of Physics: Conference Series 2571 (1), 012025, 2023 | | 2023 |
| Design and implementation of high-performance hybridadders R Samanth, SS Joshi, SG Nayak AIP Conference Proceedings 2357 (1), 2022 | | 2022 |
| An Efficient Two-phase Clocked Sequential Multiply: Accumulator Unit for Image Blurring R Samanth, SG Nayak International Journal of Electronics and Telecommunications 68, 2022 | | 2022 |
| High-speed hybrid tree multiplier hardware using modified Wallace and Dadda method R Samanth, SG Nayak AIP Conference Proceedings 2358 (1), 2021 | | 2021 |
