| Designing modular hardware accelerators in C with ROCCC 2.0 J Villarreal, A Park, W Najjar, R Halstead 2010 18th IEEE annual international symposium on field-programmable custom …, 2010 | 290 | 2010 |
| High-level language tools for reconfigurable computing S Windh, X Ma, RJ Halstead, P Budhkar, Z Luna, O Hussaini, WA Najjar Proceedings of the IEEE 103 (3), 390-408, 2015 | 100 | 2015 |
| Accelerating join operation for relational databases with FPGAs RJ Halstead, B Sukhwani, H Min, M Thoennes, P Dube, S Asaad, B Iyer 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013 | 81 | 2013 |
| FPGA-based Multithreading for In-Memory Hash Joins. RJ Halstead, I Absalyamov, WA Najjar, VJ Tsotras CIDR, 2015 | 74 | 2015 |
| Efficient XML Path Filtering Using GPUs. R Moussalli, RJ Halstead, M Salloum, WA Najjar, VJ Tsotras ADMS@ VLDB, 9-18, 2011 | 36 | 2011 |
| Exploring irregular memory accesses on fpgas RJ Halstead, J Villarreal, W Najjar Proceedings of the 1st Workshop on Irregular Applications: Architectures and …, 2011 | 31 | 2011 |
| FPGA-accelerated group-by aggregation using synchronizing caches I Absalyamov, P Budhkar, S Windh, RJ Halstead, WA Najjar, VJ Tsotras Proceedings of the 12th International Workshop on Data Management on New …, 2016 | 30 | 2016 |
| Compiled multithreaded data paths on fpgas for dynamic workloads RJ Halstead, W Najjar 2013 International Conference on Compilers, Architecture and Synthesis for …, 2013 | 30 | 2013 |
| Compiling irregular applications for reconfigurable systems RJ Halstead, J Villarreal, WA Najjar International Journal of High Performance Computing and Networking 7 (4 …, 2014 | 20 | 2014 |
| Data filtering using a plurality of hardware accelerators SW Asaad, RJ Halstead, B Sukhwani US Patent 10,372,700, 2019 | 13 | 2019 |
| A study on parallelizing XML path filtering using accelerators R Moussalli, M Salloum, R Halstead, W Najjar, VJ Tsotras ACM Transactions on Embedded Computing Systems (TECS) 13 (4), 1-28, 2014 | 12 | 2014 |
| ROCCC 2.0 WA Najjar, J Villarreal, RJ Halstead FPGAs for software programmers, 191-204, 2016 | 6 | 2016 |
| Using multithreaded techniques to mask memory latency on FPGA accelerators RJ Halstead University of California, Riverside, 2015 | 5 | 2015 |
| Efficient local locking for massively multithreaded in-memory hash-based operators B Romanous, S Windh, I Absalyamov, P Budhkar, R Halstead, W Najjar, ... The VLDB Journal 30 (3), 333-359, 2021 | 3 | 2021 |
| SpVM acceleration with latency masking threads on FPGAs RJ Halstead, WA Najjar, O Huseini algorithms 20, 21, 2014 | 3 | 2014 |
| Data filtering using a plurality of hardware accelerators SW Asaad, RJ Halstead, B Sukhwani US Patent 10,387,403, 2019 | 2 | 2019 |
| Is there a tradeoff between programmability and performance? R Halstead, J Villarreal, R Moussalli, W Najjar 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals …, 2010 | 2 | 2010 |
| Special Issue on Reconfigurable Systems: Foundations [Guest editors' introduction] J Lyke, CG Christodoulou, A Vera, AH Edwards Proceedings of the IEEE 103 (3), 287-290, 2015 | 1 | 2015 |
| Data filtering using a plurality of hardware accelerators SW Asaad, RJ Halstead, B Sukhwani US Patent 11,615,069, 2023 | | 2023 |
| High Level Language Tools for Reconfigurable Computing R Halstead, P Budhkar, O Hussaini, Z Luna | | 1989 |
Walid NajjarUniversity of California RiversideCorreu electrònic verificat a cs.ucr.edu