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Swagath Venkataramani
Swagath Venkataramani
Principal Research Staff Member, IBM T.J. Watson Research Center / Purdue Univ.
Correu electrònic verificat a ibm.com - Pàgina d'inici
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Pact: Parameterized clipping activation for quantized neural networks
J Choi, Z Wang, S Venkataramani, PIJ Chuang, V Srinivasan, ...
arXiv preprint arXiv:1805.06085, 2018
11302018
SALSA: Systematic logic synthesis of approximate circuits
S Venkataramani, A Sabne, V Kozhikkottu, K Roy, A Raghunathan
Proceedings of the 49th Annual Design Automation Conference, 796-801, 2012
4122012
Quality programmable vector processors for approximate computing
S Venkataramani, VK Chippa, ST Chakradhar, K Roy, A Raghunathan
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
3602013
Approximate computing and the quest for computing efficiency
S Venkataramani, ST Chakradhar, K Roy, A Raghunathan
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
3472015
AxNN: Energy-efficient neuromorphic systems using approximate computing
S Venkataramani, A Ranjan, K Roy, A Raghunathan
Proceedings of the 2014 international symposium on Low power electronics and …, 2014
3392014
Scaledeep: A scalable compute architecture for learning and evaluating deep networks
S Venkataramani, A Ranjan, S Banerjee, D Das, S Avancha, ...
Proceedings of the 44th Annual International Symposium on Computer …, 2017
2832017
Hybrid 8-bit floating point (HFP8) training and inference for deep neural networks
X Sun, J Choi, CY Chen, N Wang, S Venkataramani, VV Srinivasan, X Cui, ...
Advances in neural information processing systems 32, 2019
2612019
Ultra-low precision 4-bit training of deep neural networks
X Sun, N Wang, CY Chen, J Ni, A Agrawal, X Cui, S Venkataramani, ...
Advances in Neural Information Processing Systems 33, 1796-1807, 2020
2202020
Substitute-and-simplify: A unified design paradigm for approximate and quality configurable circuits
S Venkataramani, K Roy, A Raghunathan
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2013
2152013
ACCURATE AND EFFICIENT 2-BIT QUANTIZED NEURAL NETWORKS
J Choi, S Venkataramani, V Srinivasan, K Gopalakrishnan, Z Wang, ...
SysML Conference, 2019
2132019
ASLAN: Synthesis of approximate sequential circuits
A Ranjan, A Raha, S Venkataramani, K Roy, A Raghunathan
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
1632014
A scalable multi-TeraOPS deep learning processor core for AI trainina and inference
B Fleischer, S Shukla, M Ziegler, J Silberman, J Oh, V Srinivasan, J Choi, ...
2018 IEEE symposium on VLSI circuits, 35-36, 2018
1562018
Approximate storage for energy efficient spintronic memories
A Ranjan, S Venkataramani, X Fong, K Roy, A Raghunathan
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
1172015
Scalable-effort classifiers for energy-efficient machine learning
S Venkataramani, A Raghunathan, J Liu, M Shoaib
Proceedings of the 52nd annual design automation conference, 1-6, 2015
1032015
Multiplier-less artificial neurons exploiting error resiliency for energy-efficient neural computing
SS Sarwar, S Venkataramani, A Raghunathan, K Roy
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 145-150, 2016
1012016
RaPiD: AI Accelerator for Ultra-Low Precision Training and Inference
S Venkataramani, V Srinivasan, W Wang, S Sen, J Zhang, A Agrawal, ...
Proceedings of the 48th Annual International Symposium on Computer Architecture, 2021
932021
Approximate computing: An integrated hardware approach
VK Chippa, S Venkataramani, ST Chakradhar, K Roy, A Raghunathan
2013 Asilomar conference on signals, systems and computers, 111-117, 2013
932013
Bridging the accuracy gap for 2-bit quantized neural networks (qnn)
J Choi, PIJ Chuang, Z Wang, S Venkataramani, V Srinivasan, ...
arXiv preprint arXiv:1807.06964, 2018
892018
9.1 A 7nm 4-core AI chip with 25.6 TFLOPS hybrid FP8 training, 102.4 TOPS INT4 inference and workload-aware throttling
A Agrawal, SK Lee, J Silberman, M Ziegler, M Kang, S Venkataramani, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 144-146, 2021
872021
Stag: Spintronic-tape architecture for gpgpu cache hierarchies
R Venkatesan, SG Ramasubramanian, S Venkataramani, K Roy, ...
ACM SIGARCH Computer Architecture News 42 (3), 253-264, 2014
862014
En aquests moments el sistema no pot dur a terme l'operació. Torneu-ho a provar més tard.
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