Sensing nanosecond-scale voltage attacks and natural transients in FPGAs KM Zick, M Srivastav, W Zhang, M French Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2013 | 147 | 2013 |
ASIC implementations of five SHA-3 finalists X Guo, M Srivastav, S Huang, D Ganta, MB Henry, L Nazhandali, ... 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012 | 34 | 2012 |
Silicon implementation of sha-3 finalists: BLAKE, Grøstl, JH, Keccak and Skein X Guo, M Srivastav, S Huang, D Ganta, MB Henry, L Nazhandali, ... ECRYPT II Hash Workshop, 2011 | 21 | 2011 |
Design and benchmarking of an ASIC with five SHA-3 finalist candidates M Srivastav, X Guo, S Huang, D Ganta, MB Henry, L Nazhandali, ... Microprocessors and Microsystems 37 (2), 246-257, 2013 | 20 | 2013 |
Power reduction technique using multi-Vt libraries M Srivastav, S Rao, H Bhatnagar Fifth International Workshop on System-on-Chip for Real-Time Applications …, 2005 | 18 | 2005 |
Pre-silicon characterization of nist sha-3 final round candidates X Guo, M Srivastav, S Huang, D Ganta, MB Henry, L Nazhandali, ... 2011 14th Euromicro Conference on Digital System Design, 535-542, 2011 | 12 | 2011 |
Design of energy-efficient, adaptable throughput systems at near/sub-threshold voltage M Srivastav, MB Henry, L Nazhandali ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (1 …, 2013 | 10 | 2013 |
Design of low-power, scalable-throughput systems at near/sub threshold voltage M Srivastav, MB Henry, L Nazhandali Thirteenth International Symposium on Quality Electronic Design (ISQED), 609-616, 2012 | 9 | 2012 |
A case for nems-based functional-unit power gating of low-power embedded microprocessors M Henry, M Srivastav, L Nazhandali Proceedings of the 48th Design Automation Conference, 872-877, 2011 | 7 | 2011 |
Performance Evaluation of Cryptographic Hardware and Software–Performance Evaluation of SHA-3 Candidates in ASIC and FPGA X Guo, M Srivastav, S Huang, D Ganta, MB Henry, L Nazhandali, ... May, 2011 | 6 | 2011 |
Performance Evaluation of Cryptographic Hardware and Software–Performance Evaluation of SHA-3 Candidates in ASIC and FPGA, May 2011 X Guo, S Huang, M Srivastava, L Nazhandali, P Schaumont | 3 | |
Silicon Implementation of SHA-3 Final Round Candidates: BLAKE, Grøstl, JH, Keccak and Skein X Guo, M Srivastav, S Huang, L Nazhandali, P Schaumont | 2 | 2009 |
Design of ultra-low power scalable-throughput many-core DSP applications M Srivastav, M Ehteshamuddin, K Stegner, L Nazhandali ACM Transactions on Design Automation of Electronic Systems (TODAES) 20 (3 …, 2015 | 1 | 2015 |
Study of the impact of aging on many-core energy-efficient DSP systems M Srivastav, L Nazhandali Sixteenth International Symposium on Quality Electronic Design, 66-70, 2015 | 1 | 2015 |
Design and analysis of multi-core homogeneous systems for energy harvesting applications M Srivastav, L Nazhandali 2012 19th IEEE International Conference on Electronics, Circuits, and …, 2012 | 1 | 2012 |
Variation Aware Energy-Efficient Methodologies for Homogeneous Many-Core Designs MS Srivastav Virginia Tech, 2015 | | 2015 |
Study of ASIC technology impact factors on performance evaluation of SHA-3 candidates M Srivastav, Y Zuo, X Guo, L Nazhandali, P Schaumont Proceedings of the 23rd ACM international conference on Great lakes …, 2013 | | 2013 |
Pre-silicon Characterization of NIST SHA-3 Final Round Candidates M Srivastav, L Nazhandali, MB Henry, D Ganta, X Guo, P Schaumont, ... | | 2011 |