| Mcunet: Tiny deep learning on iot devices J Lin, WM Chen, Y Lin, C Gan, S Han Advances in neural information processing systems 33, 11711-11722, 2020 | 611 | 2020 |
| Managing power and performance for system-on-chip designs using voltage islands DE Lackey, PS Zuchowski, TR Bednar, DW Stout, SW Gould, JM Cohn Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002 | 486 | 2002 |
| KOAN/ANAGRAM II: New tools for device-level analog placement and routing JM Cohn, DJ Garrod, RA Rutenbar, LR Carley IEEE Journal of Solid-State Circuits 26 (3), 330-342, 1991 | 381 | 1991 |
| Pushing ASIC performance in a power envelope R Puri, L Stok, J Cohn, D Kung, D Pan, D Sylvester, A Srivastava, ... Proceedings of the 40th annual Design Automation Conference, 788-793, 2003 | 219 | 2003 |
| Use of redundant routes to increase the yield and reliability of a VLSI layout MT Buehler, JM Cohn, DJ Hathaway, JD Hibbeler, J Koehl US Patent 7,308,669, 2007 | 211 | 2007 |
| Circuit layout methodology using a shape processing application JM Cohn, J Hibbeler, AK Stamper, JH Rankin US Patent 7,188,322, 2007 | 199 | 2007 |
| Analog device-level layout automation JM Cohn, DJ Garrod, RA Rutenbar, R Carley Springer Science & Business Media, 2012 | 197 | 2012 |
| Hierarchical layout method for integrated circuits RJ Allen, JM Cohn, SG Lovejoy US Patent 6,574,779, 2003 | 172 | 2003 |
| Autonomous decentralized peer-to-peer telemetry JM Cohn, PG Finn, SP Nair, SB Panikkar, VS Pureswaran US Patent 10,257,270, 2019 | 149 | 2019 |
| Deep analysis of cnn-based spatio-temporal representations for action recognition CFR Chen, R Panda, K Ramakrishnan, R Feris, J Cohn, A Oliva, Q Fan Proceedings of the IEEE/CVF conference on computer vision and pattern …, 2021 | 132 | 2021 |
| Device self-servicing in an autonomous decentralized peer-to-peer environment JM Cohn, SP Nair, SB Panikkar, VS Pureswaran US Patent 10,079,881, 2018 | 103 | 2018 |
| Object placement aid JM Cohn, FL Heng US Patent 5,535,134, 1996 | 86 | 1996 |
| Design rule correction system and method FL Heng, Z Chen, GE Tellez, J Cohn, R Narayan US Patent 6,189,132, 2001 | 85 | 2001 |
| The A to Z of SoCs RA Bergamaschi, J Cohn Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002 | 72 | 2002 |
| Method for supply voltage drop analysis during placement phase of chip design JM Cohn, J Venuto, IL Wemple, PS Zuchowski US Patent 6,523,154, 2003 | 71 | 2003 |
| Scale: Safe community awareness and alerting leveraging the internet of things K Benson, C Fracchia, G Wang, Q Zhu, S Almomen, J Cohn, L D'arcy, ... IEEE Communications Magazine 53 (12), 27-34, 2015 | 69 | 2015 |
| Physical design system and method JM Cohn, JA Culp, UA Finkler, FL Heng, MA Lavin, JF Lee, LW Liebmann, ... US Patent 7,536,664, 2009 | 67 | 2009 |
| Method of adding fabrication monitors to integrated circuit chips JW Adkisson, G Bazan, JM Cohn, MS Grady, TG Sopchak, DP Vallett US Patent 7,240,322, 2007 | 64 | 2007 |
| A low-noise, single-photon avalanche diode in standard 0.13 μm complementary metal-oxide-semiconductor process RM Field, J Lary, J Cohn, L Paninski, KL Shepard Applied Physics Letters 97 (21), 2010 | 61 | 2010 |
| Planning for integrated systems and technologies: a how-to-do-it manual for librarians JM Cohn, AL Kelsey, KM Fiels, D Salter (No Title), 2002 | 58 | 2002 |
Rob A. RutenbarProfessor of Computer Science and Electrical and Computer Engineering, University of PittsburghCorreu electrònic verificat a pitt.edu