| Silicides and ohmic contacts JP Gambino, EG Colgan Materials chemistry and physics 52 (2), 99-146, 1998 | 536 | 1998 |
| An overview of through-silicon-via technology and manufacturing challenges JP Gambino, SA Adderly, JU Knickerbocker Microelectronic Engineering 135, 73-106, 2015 | 309 | 2015 |
| Bonded semiconductor substrate including a cooling mechanism JP Gambino, AK Stamper US Patent 7,943,428, 2011 | 266 | 2011 |
| Formation and stability of silicides on polycrystalline silicon EG Colgan, JP Gambino, QZ Hong Materials Science and Engineering: R: Reports 16 (2), 43-96, 1996 | 264 | 1996 |
| Double-sided integrated circuit chips K Bernstein, T Dalton, JP Gambino, MD Jaffe, PD Kartschoke, SE Luce, ... US Patent 8,421,126, 2013 | 257 | 2013 |
| Fin field effect transistor with self-aligned gate JP Gambino, JB Lasky, JH Rankin US Patent 6,689,650, 2004 | 256 | 2004 |
| Low-K gate spacers by fluorine implantation JP Gambino, J Mandelman, WR Tonti US Patent 6,720,213, 2004 | 254 | 2004 |
| Embedded DRAM on silicon-on-insulator substrate JW Adkisson, R Divakaruni, JP Gambino, JA Mandelman US Patent 6,350,653, 2002 | 175* | 2002 |
| Damascene copper wiring image sensor JW Adkisson, JP Gambino, MD Jaffe, RK Leidy, AK Stamper US Patent 7,193,289, 2007 | 172 | 2007 |
| CMOS imager array with recessed dielectric JW Adkisson, JP Gambino, ZX He, MD Jaffe, RK Leidy, SE Luce, ... US Patent 7,781,781, 2010 | 167 | 2010 |
| Wafer-to-wafer alignments TJ Dalton, JP Gambino, MD Jaffe, SE Luce, EJ Sprogis US Patent 7,193,423, 2007 | 166 | 2007 |
| Edge seals for semiconductor packages JP Gambino, K Thomas, DT Price, R Winzenread, B Greenwood US Patent 10,431,614, 2019 | 161 | 2019 |
| Nitride etch for improved spacer uniformity JA Culp, JJ Ellis-Monaghan, JP Gambino, KD Peterson, JH Rankin, ... US Patent 8,470,713, 2013 | 143 | 2013 |
| Stacked imager package JW Adkisson, JP Gambino, MD Jaffe, RK Leidy, SE Luce, RJ Rassel, ... US Patent 7,361,989, 2008 | 119 | 2008 |
| Effect of heat treatments on the wetting behavior of bismuth‐rich intergranular phases in ZnO: Bi: Co Varistors JP Gambino, WD Kingery, GE Pike, LM Levinson, HR Philipp Journal of the American Ceramic Society 72 (4), 642-645, 1989 | 102 | 1989 |
| Determination of the Fowler–Nordheim tunneling parameters from the Fowler–Nordheim plot YL Chiou, JP Gambino, M Mohammad Solid-State Electronics 45 (10), 1787-1791, 2001 | 97 | 2001 |
| Exposed pore sealing post patterning EC Cooney III, JA Fitzsimmons, JP Gambino, SE Luce, TL Mcdevitt, ... US Patent 7,015,150, 2006 | 92 | 2006 |
| Method of manufacturing high performance copper inductors with bond pads JP Gambino, WT Motsiff, EG Walton US Patent 7,207,096, 2007 | 84 | 2007 |
| Self-aligned metal capping layers for copper interconnects using electroless plating J Gambino, J Wynne, J Gill, S Mongeon, D Meatyard, B Lee, H Bamnolker, ... Microelectronic engineering 83 (11-12), 2059-2067, 2006 | 82 | 2006 |
| Nickel silicide thermal stability on polycrystalline and single crystalline silicon EG Colgan, JP Gambino, B Cunningham Materials chemistry and physics 46 (2-3), 209-214, 1996 | 81 | 1996 |
Shawn AdderlyPacific Gas and Electric, IBM Alum, University of Michigan-Ann Arbor, University of IllinoisCorreu electrònic verificat a pge.com