| A full Ka-band power amplifier with 32.9% PAE and 15.3-dBm power in 65-nm CMOS H Jia, CC Prawoto, B Chi, Z Wang, CP Yue IEEE Transactions on Circuits and Systems I: Regular Papers 65 (9), 2657-2668, 2018 | 163 | 2018 |
| A 77 GHz frequency doubling two-path phased-array FMCW transceiver for automotive radar H Jia, L Kuang, W Zhu, Z Wang, F Ma, Z Wang, B Chi IEEE Journal of Solid-State Circuits 51 (10), 2299-2311, 2016 | 159 | 2016 |
| A 47.6–71.0-GHz 65-nm CMOS VCO Based on Magnetically Coupled -Type LC Network H Jia, B Chi, L Kuang, Z Wang IEEE Transactions on Microwave Theory and Techniques 63 (5), 1645-1657, 2015 | 52 | 2015 |
| A W-band power amplifier utilizing a miniaturized Marchand balun combiner H Jia, B Chi, L Kuang, Z Wang IEEE Transactions on Microwave Theory and Techniques 63 (2), 719-725, 2015 | 50 | 2015 |
| A D-band joint radar-communication CMOS transceiver W Deng, Z Chen, H Jia, P Guan, T Ma, A Yan, S Sun, X Huang, G Chen, ... IEEE Journal of Solid-State Circuits 58 (2), 411-427, 2022 | 44 | 2022 |
| A W-band injection-locked frequency doubler based on top-injected coupled resonator H Jia, L Kuang, Z Wang, B Chi IEEE Transactions on Microwave Theory and Techniques 64 (1), 210-218, 2015 | 42 | 2015 |
| An energy-efficient 10-Gb/s CMOS millimeter-wave transceiver with direct-modulation digital transmitter and I/Q phase-coupled frequency synthesizer W Deng, Z Song, R Ma, J Lin, Y Li, J Ye, S Kong, S Hu, H Jia, B Chi IEEE Journal of Solid-State Circuits 55 (8), 2027-2042, 2020 | 37 | 2020 |
| Trending IC design directions in 2022 CH Chan, L Cheng, W Deng, P Feng, L Geng, M Huang, H Jia, L Jie, ... Journal of Semiconductors 43 (7), 071401, 2022 | 36 | 2022 |
| A fully integrated 60-GHz 5-Gb/s QPSK transceiver with T/R switch in 65-nm CMOS L Kuang, X Yu, H Jia, L Chen, W Zhu, M Wei, Z Song, Z Wang, B Chi IEEE Transactions on Microwave Theory and Techniques 62 (12), 3131-3145, 2014 | 36 | 2014 |
| 20.3 A 60GHz 186.5 dBc/Hz FoM quad-core fundamental VCO using circular triple-coupled transformer with no mode ambiguity in 65nm CMOS H Jia, W Deng, P Guan, Z Wang, B Chi 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 1-3, 2021 | 35 | 2021 |
| Co-design of 60-GHz wideband front-end IC with on-chip T/R switch based on passive macro-modeling L Kuang, B Chi, H Jia, Z Ye, W Jia, Z Wang IEEE Transactions on Microwave Theory and Techniques 62 (11), 2743-2754, 2014 | 30 | 2014 |
| An 8.2-to-21.5 GHz dual-core quad-mode orthogonal-coupled VCO with concurrently dual-output using parallel 8-shaped resonator W Deng, H Jia, R Wu, S Sun, C Li, Z Wang, B Chi 2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021 | 28 | 2021 |
| A 60-GHz CMOS dual-mode power amplifier with efficiency enhancement at low output power L Kuang, B Chi, H Jia, W Jia, Z Wang IEEE Transactions on Circuits and Systems II: Express Briefs 62 (4), 352-356, 2015 | 28 | 2015 |
| A 32.9% PAE, 15.3 dBm, 21.6–41.6 GHz power amplifier in 65nm CMOS using coupled resonators H Jia, CC Prawoto, B Chi, Z Wang, CP Yue 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC), 345-348, 2016 | 26 | 2016 |
| A scalable adaptive ADC/DSP-based 1.25-to-56Gbps/112Gbps high-speed transceiver architecture using decision-directed MMSE CDR in 16nm and 7nm D Xu, Y Kou, P Lai, Z Cheng, TY Cheung, L Moser, Y Zhang, X Liu, ... Digest of Technical Papers-IEEE International Solid-State Circuits Conference, 2021 | 25 | 2021 |
| 25.6 A 70.5-to-85.5 GHz 65nm phase-locked loop with passive scaling of loop filter Z Huang, HC Luong, B Chi, Z Wang, H Jia 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 24 | 2015 |
| A low-phase-noise quad-core millimeter-wave fundamental VCO using circular triple-coupled transformer in 65-nm CMOS H Jia, P Guan, W Deng, Z Wang, B Chi IEEE Journal of Solid-State Circuits 58 (2), 371-385, 2022 | 23 | 2022 |
| A 35-GHz TX and RX front end with high TX output power for Ka-band FMCW phased-array radar transceivers in CMOS technology W Deng, R Wu, Z Chen, M Ding, H Jia, B Chi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (10 …, 2020 | 23 | 2020 |
| A self-adapted two-point modulation type-II digital PLL for fast chirp rate and wide chirp-bandwidth FMCW signal generation W Deng, Z Chen, H Jia, A Yan, S Sun, G Chen, Z Wang, B Chi IEEE Journal of Solid-State Circuits 57 (4), 1162-1174, 2021 | 21 | 2021 |
| A 53.6-to-60.2 GHz many-core fundamental oscillator with scalable mesh topology achieving-136.0 dBc/Hz phase noise at 10MHz offset and 190.3 dBc/Hz peak FoM in 65nm CMOS H Jia, R Ma, W Deng, Z Wang, B Chi 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 154-156, 2022 | 17 | 2022 |