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Gaurav Singla
Gaurav Singla
E-mailová adresa ověřena na: amd.com
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Citace
Citace
Rok
Predictive Dynamic Thermal and Power Management for Heterogeneous Mobile Platforms
G Singla
Arizona State University, 2015
1262015
Algorithmic optimization of thermal and power management for heterogeneous mobile platforms
G Bhat, G Singla, AK Unver, UY Ogras
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (3), 544-557, 2017
1032017
Write assist circuitry
AN Madhavan, AB Srinivasa, SK Rout, GR Singla, V Nautiyal, SS Dwivedi, ...
US Patent 11,043,262, 2021
122021
An ultra high density pseudo dual-port SRAM in 16nm FINFET process for graphics processors
V Nautiyal, G Singla, L Gupta, S Dwivedi, M Kinkade
2017 30th IEEE International System-on-Chip Conference (SOCC), 12-17, 2017
112017
Self-timed shaper circuit for wide memories in advanced cmos technologies
V Nautiyal, G Singla, S Dwivedi, S Singh, I Chang, J Dasani, FA Bohra
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018
72018
Robust, self-timed power-on reset circuit for low-voltage applications
V Nautiyal, G Singla, L Gupta, J Dasani, S Dwivedi, M Kinkade
2017 IFIP/IEEE International Conference on Very Large Scale Integration …, 2017
72017
Charge recycled low power SRAM with integrated write and read assist, for wearable electronics, designed in 7nm FinFET
V Nautiyal, G Singla, S Singh, F ali Bohra, J Dasani, L Gupta, S Dwivedi
2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017
62017
Dummy wordline design techniques
L Gupta, SS Dwivedi, F ali Bohra, GR Singla
US Patent 10,943,670, 2021
52021
Predictive dynamic thermal and power management for heterogeneous mobile platforms. In 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)
G Singla, G Kaur, AK Unver, UY Ogras
IEEE, 2015
52015
Logic-based row redundancy technique designed in 7nm FinFET technology for embedded SRAMs
V Nautiyal, N Nukala, FA Bohra, S Dwivedi, J Dasani, S Singh, G Singla, ...
2018 19th International Symposium on Quality Electronic Design (ISQED), 274-279, 2018
42018
Bitline Precharge Circuitry
L Gupta, GR Singla, F ali Bohra, SS Dwivedi
US Patent App. 16/435,425, 2020
32020
Hardware-in-Loop for all Types of Hybrid Vehicles using Open Modular Hardware to Meet ISO 26262 Standard
B Kalghatgi, M Kaur, G Singla, A Ranjan, P Sarkar
SAE Technical Paper, 2014
22014
Dynamic setup and hold times adjustment for memories
JJ Wuu, J Kuszczak, G Singla
US Patent App. 17/564,747, 2023
12023
Self-timed write aid circuit for tall memories in advanced CMOS technologies
V Nautiyal, G Singla, B Maiti, M Kinkade
2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2021
12021
High-speed memory architecture
L Gupta, F ali Bohra, J Dasani, SS Dwivedi, V Nautiyal, GR Singla
US Patent 10,622,038, 2020
2020
Self-timed Power-on Reset Circuit for Pseudo Dual/Two Port SRAM Used in Low-Voltage IoT Applications
V Nautiyal, L Gupta, G Singla, J Dasani, S Dwivedi, M Kinkade
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things: 25th …, 2019
2019
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