| Residue-to-binary arithmetic converter for the moduli set (2/sup k/, 2/sup k/-1, 2/sup k-1/-1) AA Hiasat, SH Abdel-Aty-Zohdy IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1998 | 136 | 1998 |
| A new efficient memoryless residue to binary converter S Andraos, H Ahmad IEEE Transactions on circuits and systems 35 (11), 1441-1444, 1988 | 135 | 1988 |
| High-speed and reduced-area modular adder structures for RNS AA Hiasat IEEE Transactions on Computers 51 (1), 84-89, 2002 | 128 | 2002 |
| New efficient structure for a modular multiplier for RNS AA Hiasat IEEE Transactions on Computers 49 (2), 170-174, 2000 | 92 | 2000 |
| New memoryless, mod (2n±1) residue multiplier A Hiasat Electronics Letters 28 (3), 314-315, 1992 | 84 | 1992 |
| VLSI implementation of new arithmetic residue to binary decoders AA Hiasat IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (1), 153-158, 2005 | 80 | 2005 |
| Performance analysis of a private blockchain network built on Hyperledger Fabric for healthcare G Al-Sumaidaee, R Alkhudary, Z Zilic, A Swidan Information Processing & Management 60 (2), 103160, 2023 | 75 | 2023 |
| Design and implementation of a new efficient median filtering algorithm AA Hiasat, MM Al-Ibrahim, KM Gharaibeh IEE Proceedings-Vision, Image and Signal Processing 146 (5), 273-278, 1999 | 36 | 1999 |
| A reverse converter and sign detectors for an extended RNS five-moduli set A Hiasat IEEE Transactions on Circuits and Systems I: Regular Papers 64 (1), 111-121, 2016 | 32 | 2016 |
| Analysis of strong password using keystroke dynamics authentication in touch screen devices A Salem, D Zaidan, A Swidan, R Saifan 2016 Cybersecurity and Cyberforensics Conference (CCC), 15-21, 2016 | 31 | 2016 |
| Design and implementation of an RNS division algorithm AA Hiasat, HS Abdel-Aty-Zohdy Proceedings 13th IEEE Sympsoium on Computer Arithmetic, 240-249, 1997 | 31 | 1997 |
| An Efficient Reverse Converter for the Three-Moduli Set ( ) A Hiasat IEEE Transactions on Circuits and Systems II: Express Briefs 64 (8), 962-966, 2016 | 30 | 2016 |
| Residue number system to binary converter for the moduli set (2n− 1, 2n− 1, 2n+ 1) A Hiasat, A Sweidan Journal of systems architecture 49 (1-2), 53-58, 2003 | 30 | 2003 |
| Mobility and direction aware ad-hoc on demand distance vector routing protocol A Swidan, HB Abdelghany, R Saifan, Z Zilic Procedia Computer Science 94, 49-56, 2016 | 29 | 2016 |
| Efficient RNS Scalers for the Extended Three-Moduli Set A Hiasat IEEE Transactions on Computers 66 (7), 1253-1260, 2017 | 28 | 2017 |
| Semi-custom VLSI design and implementation of a new efficient RNS division algorithm AA Hiasat, H Abdel-Aty-Zohdy The Computer Journal 42 (3), 232-240, 1999 | 26 | 1999 |
| A Residue-to-Binary Converter for the Extended Four-Moduli Set A Hiasat IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (7 …, 2017 | 24 | 2017 |
| A Suggestion for a Fast Residue Multiplier for a Family of Moduli of the Form (2n − (2p ± 1)) AA Hiasat The Computer Journal 47 (1), 93-102, 2004 | 24 | 2004 |
| Quaternary to binary bit conversion CMOS integrated circuit design using multiple-input floating gate MOSFETS A Srivastava, HN Venkata Integration 36 (3), 87-101, 2003 | 23 | 2003 |
| Combinational logic approach for implementing an improved approximate squaring function AA Hiasat, HS Abdel-Aty-Zohdy IEEE Journal of Solid-state Circuits 34 (2), 236-240, 1999 | 23 | 1999 |
