| PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory P Chi, S Li, C Xu, T Zhang, J Zhao, Y Liu, Y Wang, Y Xie ACM SIGARCH Computer Architecture News 44 (3), 27-39, 2016 | 1878 | 2016 |
| Deep gradient compression: Reducing the communication bandwidth for distributed training Y Lin, S Han, H Mao, Y Wang, WJ Dally arXiv preprint arXiv:1712.01887, 2017 | 1704 | 2017 |
| The surprising effectiveness of ppo in cooperative multi-agent games C Yu, A Velu, E Vinitsky, J Gao, Y Wang, A Bayen, Y Wu Advances in Neural Information Processing Systems 35, 24611-24624, 2022 | 1587 | 2022 |
| Going deeper with embedded fpga platform for convolutional neural network J Qiu, J Wang, S Yao, K Guo, B Li, E Zhou, J Yu, T Tang, N Xu, S Song, ... Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | 1537 | 2016 |
| Towards artificial general intelligence with hybrid Tianjic chip architecture J Pei, L Deng, S Song, M Zhao, Y Zhang, S Wu, G Wang, Z Zou, Z Wu, ... Nature 572 (7767), 106-111, 2019 | 1045 | 2019 |
| ESE: Efficient Speech Recognition Engine with Sparse LSTM on FPGA S Han, J Kang, H Mao, Y Hu, X Li, Y Li, D Xie, H Luo, S Yao, Y Wang, ... Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 864 | 2017 |
| Angel-Eye: A Complete Design Flow for Mapping CNN onto Embedded FPGA K Guo, L Sui, J Qiu, J Yu, J Wang, S Yao, S Han, Y Wang, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 646 | 2018 |
| Exploring the granularity of sparsity in convolutional neural networks H Mao, S Han, J Pool, W Li, X Liu, Y Wang, WJ Dally Proceedings of the IEEE Conference on Computer Vision and Pattern …, 2017 | 524* | 2017 |
| [DL] A survey of FPGA-based neural network inference accelerators K Guo, S Zeng, J Yu, Y Wang, H Yang ACM Transactions on Reconfigurable Technology and Systems (TRETS) 12 (1), 1-26, 2019 | 467* | 2019 |
| Distribution-balanced loss for multi-label classification in long-tailed datasets T Wu, Q Huang, Z Liu, Y Wang, D Lin Computer Vision–ECCV 2020: 16th European Conference, Glasgow, UK, August 23 …, 2020 | 298 | 2020 |
| Machine learning for electronic design automation: A survey G Huang, J Hu, Y He, J Liu, M Ma, Z Shen, J Wu, Y Xu, H Zhang, K Zhong, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 26 (5 …, 2021 | 291 | 2021 |
| Enabling FPGAs in the cloud F Chen, Y Shan, Y Zhang, Y Wang, H Franke, X Chang, K Wang Proceedings of the 11th ACM Conference on Computing Frontiers, 1-10, 2014 | 272 | 2014 |
| Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication L Xia, P Gu, B Li, T Tang, X Yin, W Huangfu, S Yu, Y Cao, Y Wang, ... Journal of Computer Science and Technology 31 (1), 3-19, 2016 | 262 | 2016 |
| Technological Exploration of RRAM Crossbar Array For Matrix-Vector Multiplication Peng Gu, Boxun Li, Tianqi Tang, Shimeng Yu, Yu Cao, Yu Wang, Huazhong Yang Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific …, 2015 | 262* | 2015 |
| 33.2 A Fully Integrated Analog ReRAM Based 78.4 TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing Q Liu, B Gao, P Yao, D Wu, J Chen, Y Pang, W Zhang, Y Liao, CX Xue, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 500-502, 2020 | 259 | 2020 |
| MNSIM: Simulation platform for memristor-based neuromorphic computing system L Xia, B Li, T Tang, P Gu, X Yin, W Huangfu, PY Chen, S Yu, Y Cao, ... 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 469-474, 2016 | 241 | 2016 |
| Scaling-up resistive synaptic arrays for neuro-inspired architecture: Challenges and prospect S Yu, PY Chen, Y Cao, L Xia, Y Wang, H Wu 2015 IEEE International Electron Devices Meeting (IEDM), 17.3. 1-17.3. 4, 2015 | 236 | 2015 |
| Fpmr: Mapreduce framework on fpga Y Shan, B Wang, J Yan, Y Wang, N Xu, H Yang Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010 | 232 | 2010 |
| Binary convolutional neural network on RRAM T Tang, L Xia, B Li, Y Wang, H Yang 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 782-787, 2017 | 222 | 2017 |
| RENO: A high-efficient reconfigurable neuromorphic computing accelerator design X Liu, M Mao, B Liu, H Li, Y Chen, B Li, Y Wang, H Jiang, M Barnell, Q Wu, ... 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2015 | 204 | 2015 |
Huazhong YangProfessor of Electronics Engineering, Tsinghua UniversityVerificeret mail på tsinghua.edu.cn
