| Evaluation of border traps and interface traps in HfO2/MoS2 gate stacks by capacitance–voltage analysis P Zhao, A Khosravi, A Azcatl, P Bolshakov, G Mirabelli, E Caruso, ... 2D Materials 5 (3), 031002, 2018 | 95 | 2018 |
| Quantum confinement-induced semimetal-to-semiconductor evolution in large-area ultra-thin PtSe 2 films grown at 400° C L Ansari, S Monaghan, N McEvoy, CÓ Coileáin, CP Cullen, J Lin, R Siris, ... npj 2D Materials and Applications 3 (1), 1-8, 2019 | 94 | 2019 |
| Insights into Multi-Level Resistive Switching in Monolayer MoS2 S Bhattacharjee, E Caruso, N McEvoy, C Ó Coileáin, K O'Neill, L Ansari, ... ACS Applied Materials & Interfaces, 2020 | 81 | 2020 |
| Performance projection of III-V ultra-thin-body, FinFET, and nanowire MOSFETs for two next-generation technology nodes M Rau, E Caruso, D Lizzit, P Palestri, D Esseni, A Schenk, L Selmi, ... 2016 IEEE International Electron Devices Meeting (IEDM), 30.6. 1-30.6. 4, 2016 | 38 | 2016 |
| Comprehensive comparison and experimental validation of band-structure calculation methods in III–V semiconductor quantum wells G Zerveas, E Caruso, G Baccarani, L Czornomaz, N Daix, D Esseni, ... Solid-State Electronics 115, 92-102, 2016 | 29 | 2016 |
| An improved surface roughness scattering model for bulk, thin-body, and quantum-well MOSFETs O Badami, E Caruso, D Lizzit, P Osgnach, D Esseni, P Palestri, L Selmi IEEE Transactions on Electron Devices 63 (6), 2306-2312, 2016 | 25 | 2016 |
| A scaled replacement metal gate InGaAs-on-Insulator n-FinFET on Si with record performance H Hahn, V Deshpande, E Caruso, S Sant, E O'Connor, Y Baumgartner, ... 2017 IEEE International Electron Devices Meeting (IEDM), 17.5. 1-17.5. 4, 2017 | 24 | 2017 |
| The impact of interface states on the mobility and drive current of In0. 53Ga0. 47As semiconductor n-MOSFETs P Osgnach, E Caruso, D Lizzit, P Palestri, D Esseni, L Selmi Solid-State Electronics 108, 90-96, 2015 | 19 | 2015 |
| The Role of Oxide Traps Aligned With the Semiconductor Energy Gap in MOS Systems E Caruso, J Lin, S Monaghan, K Cherkaoui, F Gity, P Palestri, D Esseni, ... IEEE Transactions on Electron Devices 67 (10), 4372-4378, 2020 | 18 | 2020 |
| Modelling nanoscale n-MOSFETs with III-V compound semiconductor channels: From advanced models for band structures, electrostatics and transport to TCAD L Selmi, E Caruso, S Carapezzi, M Visciarelli, E Gnani, N Zagni, P Pavan, ... 2017 IEEE International Electron Devices Meeting (IEDM), 13.4. 1-13.4. 4, 2017 | 13 | 2017 |
| Simulation analysis of III–V n-MOSFETs: Channel materials, Fermi level pinning and biaxial strain E Caruso, D Lizzit, P Osgnach, D Esseni, P Palestri, L Selmi 2014 IEEE International Electron Devices Meeting, 7.6. 1-7.6. 4, 2014 | 11 | 2014 |
| A comprehensive gate and drain trapping/detrapping noise model and its implications for thin-dielectric MOSFETs R Asanovski, P Palestri, E Caruso, L Selmi IEEE Transactions on Electron Devices 68 (10), 4826-4833, 2021 | 10 | 2021 |
| Investigating interface states and oxide traps in the MoS2/oxide/Si system E Coleman, G Mirabelli, P Bolshakov, P Zhao, E Caruso, F Gity, ... Solid-State Electronics 186, 108123, 2021 | 7 | 2021 |
| Quantum Confinement-Induced Semimetal-to-Semiconductor Evolution in Large-Area Ultra-Thin PtSe 2 Films Grown at 400 C. npj 2D Mater R Siris, T Stimpel-Lindner, KF Burke, G Mirabelli, R Duffy, E Caruso, ... Appl 3 (1), 33, 2019 | 7 | 2019 |
| On the electron velocity-field relation in ultra-thin films of III–V compound semiconductors for advanced CMOS technology nodes E Caruso, A Pin, P Palestri, L Selmi 2017 Joint International EUROSOI Workshop and International Conference on …, 2017 | 7 | 2017 |
| Performance study of strained III–V materials for ultra-thin body transistor applications M Rau, T Markussen, E Caruso, D Esseni, E Gnani, A Gnudi, ... 2016 46th European Solid-State Device Research Conference (ESSDERC), 184-187, 2016 | 7 | 2016 |
| Modeling approaches for band-structure calculation in III-V FET quantum wells E Caruso, G Zerveas, G Baccarani, L Czornomaz, N Daix, D Esseni, ... EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and …, 2015 | 7 | 2015 |
| TCAD Mobility Model of III-V Short-Channel Double-Gate FETs Including Ballistic Corrections S Carapezzi, E Caruso, A Gnudi, P Palestri, S Reggiani, E Gnani IEEE Transactions on Electron Devices 64 (12), 4882-4888, 2017 | 6 | 2017 |
| Improved surface roughness modeling and mobility projections in thin film MOSFETs O Badami, E Caruso, D Lizzit, D Esseni, P Palestri, L Selmi 2015 45th European Solid State Device Research Conference (ESSDERC), 306-309, 2015 | 6 | 2015 |
| Semi-classical modeling of nanoscale nMOSFETs with III-V channel P Palestri, E Caruso, O Badami, F Driussi, D Esseni, L Selmi 2019 Electron Devices Technology and Manufacturing Conference (EDTM), 234-236, 2019 | 4 | 2019 |
pk hurleyTyndall National Institute, University College CorkVerificeret mail på tyndall.ie
