Metal-oxide-semiconductor capacitors on GaAs with high-k gate oxide and amorphous silicon interface passivation layer S Koveshnikov, W Tsai, I Ok, JC Lee, V Torkanov, M Yakimov, ... Applied physics letters 88 (2), 2006 | 237 | 2006 |
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference M Le Gallo, R Khaddam-Aljameh, M Stanisavljevic, A Vasilopoulos, ... Nature Electronics 6 (9), 680-693, 2023 | 162 | 2023 |
HERMES Core–A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing R Khaddam-Aljameh, M Stanisavljevic, JF Mas, G Karunaratne, ... 2021 Symposium on VLSI Circuits, 1-2, 2021 | 141 | 2021 |
An analog-AI chip for energy-efficient speech recognition and transcription S Ambrogio, P Narayanan, A Okazaki, A Fasoli, C Mackin, K Hosokawa, ... Nature 620 (7975), 768-775, 2023 | 114 | 2023 |
A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI KI Seo, B Haran, D Gupta, D Guo, T Standaert, R Xie, H Shang, E Alptekin, ... 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014 | 111 | 2014 |
HERMES-Core—A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs R Khaddam-Aljameh, M Stanisavljevic, JF Mas, G Karunaratne, M Brändli, ... IEEE Journal of Solid-State Circuits 57 (4), 1027-1038, 2022 | 110 | 2022 |
Metal gate-HfO/sub 2/MOS structures on GaAs substrate with and without Si interlayer I Ok, H Kim, M Zhang, CY Kang, SJ Rhee, C Choi, SA Krishnan, T Lee, ... IEEE electron device letters 27 (3), 145-147, 2006 | 99 | 2006 |
Method for dual-channel nanowire FET device CC Hobbs, K Akarvardar, OK Injo US Patent 8,183,104, 2012 | 85 | 2012 |
Fully on-chip MAC at 14 nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format P Narayanan, S Ambrogio, A Okazaki, K Hosokawa, H Tsai, A Nomura, ... IEEE Transactions on Electron Devices 68 (12), 6629-6636, 2021 | 79 | 2021 |
Self-Aligned n-and p-channel GaAs MOSFETs on undoped and p-type substrates using HfO2 and silicon interface passivation layer IJ Ok, H Kim, M Zhang, T Lee, F Zhu, L Yu, S Koveshnikov, W Tsai, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 75 | 2006 |
Metal gate-HfO2 metal-oxide-semiconductor capacitors on n-GaAs substrate with silicon/germanium interfacial passivation layers HS Kim, I Ok, M Zhang, T Lee, F Zhu, L Yu, JC Lee Applied physics letters 89 (22), 2006 | 74 | 2006 |
Ultrathin HfO2 (equivalent oxide thickness= 1.1 nm) metal-oxide-semiconductor capacitors on n-GaAs substrate with germanium passivation HS Kim, I Ok, M Zhang, C Choi, T Lee, F Zhu, G Thareja, L Yu, JC Lee Applied physics letters 88 (25), 2006 | 73 | 2006 |
Addressing the gate stack challenge for high mobility InxGa1-xAs channels for NFETs N Goel, D Heh, S Koveshnikov, I Ok, S Oktyabrsky, V Tokranov, ... 2008 IEEE International Electron Devices Meeting, 1-4, 2008 | 70 | 2008 |
300mm FinFET results utilizing conformal, damage free, ultra shallow junctions (Xj∼5nm) formed with molecular monolayer doping technique KW Ang, J Barnett, WY Loh, J Huang, BG Min, PY Hung, I Ok, JH Yum, ... 2011 International Electron Devices Meeting, 35.5. 1-35.5. 4, 2011 | 69 | 2011 |
Self-aligned n-channel metal-oxide-semiconductor field effect transistor on high-indium-content In0. 53Ga0. 47As and InP using physical vapor deposition HfO2 and silicon … IJ Ok, H Kim, M Zhang, F Zhu, S Park, J Yum, H Zhao, D Garcia, P Majhi, ... Applied Physics Letters 92 (20), 2008 | 69 | 2008 |
Gate-first inversion-type InP metal-oxide-semiconductor field-effect transistors with atomic-layer-deposited Al2O3 gate dielectric H Zhao, D Shahrjerdi, F Zhu, M Zhang, HS Kim, I Ok, JH Yum, SI Park, ... Applied Physics Letters 92 (23), 2008 | 63* | 2008 |
Strained SiGe and Si FinFETs for high performance logic with SiGe/Si stack on SOI I Ok, K Akarvardar, S Lin, M Baykan, CD Young, PY Hung, MP Rodgers, ... 2010 International Electron Devices Meeting, 34.2. 1-34.2. 4, 2010 | 57 | 2010 |
Stable contact on one-sided gate tie-down structure OK Injo, B Pranatharthiharan, SC Seo, CVVS Surisetty US Patent 9,685,340, 2017 | 50 | 2017 |
Aggressively scaled ultra thin undoped HfO/sub 2/gate dielectric (EOT< 0.7 nm) with TaN gate electrode using engineered interface layer C Choi, CY Kang, SJ Rhee, MS Akbar, SA Krishnan, M Zhang, HS Kim, ... IEEE electron device letters 26 (7), 454-457, 2005 | 48 | 2005 |
A study of metal-oxide-semiconductor capacitors on GaAs, In0. 53Ga0. 47As, InAs, and InSb substrates using a germanium interfacial passivation layer HS Kim, I Ok, M Zhang, F Zhu, S Park, J Yum, H Zhao, JC Lee, P Majhi, ... Applied Physics Letters 93 (6), 2008 | 45 | 2008 |