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Alex Carsello
Alex Carsello
Electrical Engineering PhD Candidate, Stanford University
Bestätigte E-Mail-Adresse bei stanford.edu
Titel
Zitiert von
Zitiert von
Jahr
Creating an agile hardware design flow
R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ...
2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020
322020
Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra
A Carsello, K Feng, T Kong, K Koul, Q Liu, J Melchert, G Nyengele, ...
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022
292022
AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers
K Koul, J Melchert, K Sreedhar, L Truong, G Nyengele, K Zhang, Q Liu, ...
ACM Transactions on Embedded Computing Systems (TECS), 0
22
A framework for adding low-overhead, fine-grained power domains to CGRAs
A Nayak, K Zhang, R Setaluri, A Carsello, M Mann, S Richardson, R Bahr, ...
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 846-851, 2020
112020
Creating an agile hardware design flow. In 2020 57th ACM/IEEE Design Automation Conference (DAC)
R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ...
IEEE, 2020
92020
mflowgen: A Modular Flow Generator and Ecosystem for Community-Driven Physical Design
A Carsello, J Thomas, A Nayak, PH Chen, M Horowitz, P Raina, C Torng
Design Automation Conference (DAC), 2022
62022
Improving Energy Efficiency of CGRAs with Low-Overhead Fine-Grained Power Domains
A Nayak, K Zhang, R Setaluri, A Carsello, M Mann, C Torng, ...
ACM Transactions on Reconfigurable Technology and Systems 16 (2), 1-28, 2023
42023
Amber: A 16-nm System-on-Chip With a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra
K Feng, T Kong, K Koul, J Melchert, A Carsello, Q Liu, G Nyengele, ...
IEEE Journal of Solid-State Circuits, 2023
32023
Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration
K Feng, A Carsello, T Kong, K Koul, Q Liu, J Melchert, G Nyengele, ...
2022 IEEE Hot Chips 34 Symposium (HCS), 1-30, 2022
22022
Onyx: A 12nm 756 GOPS/W Coarse-Grained Reconfigurable Array for Accelerating Dense and Sparse Applications
K Koul, M Strange, J Melchert, A Carsello, Y Mei, O Hsu, T Kong, ...
2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2024
12024
Onyx: A Programmable Accelerator for Sparse Tensor Algebra
K Koul, M Strange, J Melchert, A Carsello, Y Mei, O Hsu, T Kong, ...
2024 IEEE Hot Chips 36 Symposium (HCS), 1-91, 2024
2024
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