| Universal modulator using CORDIC algorithm for communication application SA Kumar, VP Brahmaiah, LD Teja International Journal of Advances in Engineering & Technology 6 (6), 2480, 2014 | 4 | 2014 |
| STUDY ON COMPARISON OF VARIOUS MULTIPLIERS DYPS V.Priyanka Brahmaiah , L.Dharma Teja International Journal of Electronics and Communication Engineering …, 2013 | 4 | 2013 |
| Design of Low-Power Turbo Coder for Low-Energy Mobile Communications G Shanthi, Y Vishwakanth, LD Teja, PA Kumar, AS Kumar 2023 14th International Conference on Computing Communication and Networking …, 2023 | 2 | 2023 |
| Comparison of RLS, LMS and SMI Algorithms for Smart Antennas LDT Chaitanya Duggineni, Swaraja Kuraparthi, K Meenakshi, T Jagannadha Swamy ... 2021 5th International Conference on Electronics, Communication and …, 2021 | 2 | 2021 |
| Design and Analysis of CNTFET based Dynamic Comparator LD Teja, MA Reddy, B Pravali, K Prashanth 2023 4th International Conference on Electronics and Sustainable …, 2023 | 1 | 2023 |
| A Low Power 15T SRAM cell design based on FinFET, CNTFET and GNRFET under 20nm Processing Technology DT Lanka, SRPKS Rao Design Engineering, 5937-5956, 2021 | 1 | 2021 |
| BUILT-IN-SELF-REPAIR FOR EMBEDDED RAMS WITH EFFICIENT FAULT COVERAGE USING PMBIST LD Teja, KKVP Brahmaiah International Journal of Advances in Engineering & Technology 6 (5), 2262, 2013 | 1 | 2013 |
| VLSI Architecture for Fractional-Order Adaptive Filter LD Teja, MA Reddy, B Pravali, K Prashanth 2023 7th International Conference on Trends in Electronics and Informatics …, 2023 | | 2023 |
| Review of Design and Analysis of Different Technologies in Low Power VLSI Circuits DT Lanka, SR Prasad, KS Rao Science, Technology and Development 10 (Issue I), 269-275, 2021 | | 2021 |
| DESIGN AND ANALYSIS OF 14T SRAM CELL USING FINFET AND GNRFET TECHNOLOGIES AND IN COMPARISION WITH 10T AND 12T SRAM CELLS AR DHARMA TEJA LANKA, S. RAJENDRA PRASAD, K. SRINIVASA RAO Design Engineering 2021 (9), 6765-6778, 2021 | | 2021 |
| Design of Low Power SRAM Cell Using Multi Threshold Technique NNV L. Dharma Teja, B. Brainard Jacob, G. Gnana Teja Yadav, K. Sri Harini Advanced Science Letters 26 (5), 524-528, 2020 | | 2020 |
| Design of A High Performance 4-Bit Ternary Multiplier using CNTFET LDT P.Venkat Laxman , Ranjan K. Senapati International Journal of Innovative Technology and Exploring Engineering …, 2019 | | 2019 |
| Implementation of High throughput Soft output MIMO Eetector using PPTS Algorithm DTL Sharath Chandra.M International Journal & Magazine of Engineering, Technology, Management and …, 2015 | | 2015 |
| INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET) VP Brahmaiah, LD Teja, YP Sai Journal Impact Factor 4 (5), 132-142, 2013 | | 2013 |
| Design of Low Power 15T SRAM Cell using 20nm technology Based on FinFET, CNTFET and GNRFET DT Lanka, SR Prasad, KS Rao | | |
