| Automating RT-level operand isolation to minimize power consumption in datapaths M Münch, B Wurth, R Mehra, J Sproch, N Wehn Proceedings of the conference on Design, automation and test in Europe, 624-633, 2000 | 118 | 2000 |
| Functional multiple-output decomposition: Theory and an implicit algorithm B Wurth, K Eckl, K Antreich Proceedings of the 32nd annual ACM/IEEE Design Automation Conference, 54-59, 1995 | 88 | 1995 |
| Fast power estimation of large circuits PH Schneider, U Schlichtmann, B Wurth IEEE Design & Test of Computers 13 (1), 70-78, 1996 | 59 | 1996 |
| Reducing power dissipation after technology mapping by structural transformations B Rohfleisch, A Kölbl, B Wurth Proceedings of the 33rd annual Design Automation Conference, 789-794, 1996 | 56 | 1996 |
| A Boolean approach to performance-directed technology mapping for LUT-based FPGA designs C Legl, B Wurth, K Eckl Proceedings of the 33rd annual Design Automation Conference, 730-733, 1996 | 51 | 1996 |
| Logic clause analysis for delay optimization B Rohfleisch, B Wurth, K Antreich Proceedings of the 32nd annual ACM/IEEE Design Automation Conference, 668-672, 1995 | 45 | 1995 |
| Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs B Wurth, U Schlichtmann, K Eckl, KJ Antreich ACM Transactions on Design Automation of Electronic Systems (TODAES) 4 (3 …, 1999 | 44 | 1999 |
| Method and system for determining a signal that controls the application of operands to a circuit-implemented function for power savings M Munch, B Wurth, R Mehra, JD Sproch US Patent 6,038,381, 2000 | 35 | 2000 |
| A BIST approach to delay fault testing with reduced test length B Wurth, K Fuchs Proceedings the European Design and Test Conference. ED&TC 1995, 418-423, 1995 | 35 | 1995 |
| Modem Unit and Mobile Communication Unit B Wurth US Patent App. 13/354,540, 2012 | 32 | 2012 |
| An implicit algorithm for support minimization during functional decomposition C Legl, B Wurth, K Eckl Proceedings ED&TC European Design and Test Conference, 412-417, 1996 | 31 | 1996 |
| Computing support-minimal subfunctions during functional decomposition C Legl, B Wurth, K Eckl IEEE transactions on very large scale integration (VLSI) systems 6 (3), 354-363, 1998 | 25 | 1998 |
| Modem unit and mobile communication unit B Wurth US Patent 8,102,202, 2012 | 8 | 2012 |
| An implicit approach to functional decomposition of incompletely specified Boolean functions K Eckl, C Legl, B Wurth International Workshop on Logic Synthesis, 1997 | 8 | 1997 |
| Power analysis for sequential circuits at logic level PH Schneider, MA Senn, B Wurth Proceedings EURO-DAC'96. European Design Automation Conference with EURO …, 1996 | 6 | 1996 |
| Transition probability estimation for combinational and sequential circuits PH Schneider, B Wurth International Workshop on Logic Synthesis (IWLS), P4b1-P4b10, 1995 | 6 | 1995 |
| Efficient calculation of Boolean relations for multi-level logic optimization B Wurth, N Wehn Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC, 630-634, 1994 | 5 | 1994 |
| A new k-way partitioning approach for multiple types of FPGAs BM Riess, HA Giselbrecht, B Wurth Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair, 313-318, 1995 | 4 | 1995 |
| An implicit Roth-Karp decomposition algorithm to compute simple decomposition functions for FPGA synthesis C Legl, B Wurth, K Eckl TUM, LRE, 1995 | 4 | 1995 |
| Apparatus and method for improved precomputation to minimize power dissipation of integrated circuits L Benini, J Sproch, B Wurth US Patent 6,704,878, 2004 | 3 | 2004 |
