Outerspace: An outer product based sparse matrix multiplication accelerator S Pal, J Beaumont, DH Park, A Amarnath, S Feng, C Chakrabarti, HS Kim, ... 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 310 | 2018 |
Sparse-TPU: Adapting systolic arrays for sparse matrices X He, S Pal, A Amarnath, S Feng, DH Park, A Rovinski, H Ye, Y Chen, ... Proceedings of the 34th ACM international conference on supercomputing, 1-12, 2020 | 98 | 2020 |
A 7.3 m output non-zeros/j, 11.7 m output non-zeros/gb reconfigurable sparse matrix–matrix multiplication accelerator DH Park, S Pal, S Feng, P Gao, J Tan, A Rovinski, S Xie, C Zhao, ... IEEE Journal of Solid-State Circuits 55 (4), 933-944, 2020 | 34 | 2020 |
Transmuter: Bridging the efficiency gap using memory and dataflow reconfiguration S Pal, S Feng, D Park, S Kim, A Amarnath, CS Yang, X He, J Beaumont, ... Proceedings of the ACM International Conference on Parallel Architectures …, 2020 | 31 | 2020 |
A 7.3 m output non-zeros/j sparse matrix-matrix multiplication accelerator using memory reconfiguration in 40 nm S Pal, D Park, S Feng, P Gao, J Tan, A Rovinski, S Xie, C Zhao, ... 2019 Symposium on VLSI Technology, C150-C151, 2019 | 27 | 2019 |
Cosparse: A software and hardware reconfigurable spmv framework for graph analytics S Feng, J Sun, S Pal, X He, K Kaszyk, D Park, M Morton, T Mudge, M Cole, ... 2021 58th ACM/IEEE Design Automation Conference (DAC), 949-954, 2021 | 24 | 2021 |
Accelerating smith-waterman alignment workload with scalable vector computing DH Park, J Beaumont, T Mudge 2017 IEEE International Conference on Cluster Computing (CLUSTER), 661-668, 2017 | 6 | 2017 |
Sensitivity to Noise in Particle Filters for 2-D Tracking Algorithms DH Park, S PORTER, S WARKENTIN Nursing 6, 58-65, 2013 | 2 | 2013 |
Optimizing Sparse Linear Algebra on Reconfigurable Architecture DH Park | | 2021 |
Sphynx: A Shared Instruction Cache Exporatory Study D Park, A Bagaria, F Hannan, E Storm, J Spjut arXiv preprint arXiv:1412.1140, 2014 | | 2014 |
saveCHIMP: Application-aware Testbench for Chip Multi-Processors A Khurana, D Park, T Wong | | |