Software defined monitoring of application protocols L Kekely, J Kučera, V Puš, J Kořenek, AV Vasilakos IEEE Transactions on Computers 65 (2), 615-626, 2015 | 72 | 2015 |
Configurable FPGA packet parser for terabit networks with guaranteed wire-speed throughput J Cabal, P Benáček, L Kekely, M Kekely, V Puš, J Kořenek Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018 | 35 | 2018 |
Low-latency modular packet header parser for FPGA V Pus, L Kekely, J Korenek Proceedings of the eighth ACM/IEEE symposium on Architectures for networking …, 2012 | 31 | 2012 |
Design methodology of configurable high performance packet parser for FPGA V Puš, L Kekely, J Kořenek 17th International Symposium on Design and Diagnostics of Electronic …, 2014 | 23 | 2014 |
Fast lookup for dynamic packet filtering in FPGA L Kekely, M Žádník, J Kořenek 17th International Symposium on Design and Diagnostics of Electronic …, 2014 | 19 | 2014 |
General memory efficient packet matching FPGA architecture for future high-speed networks M Kekely, L Kekely, J Kořenek Microprocessors and Microsystems 73, 102950, 2020 | 17 | 2020 |
Hardware accelerated flow measurement of 100 Gb ethernet V Puš, P Velan, L Kekely, J Kořenek, P Minařík 2015 IFIP/IEEE International Symposium on Integrated Network Management (IM …, 2015 | 13 | 2015 |
High-speed computation of crc codes for fpgas J Cabal, L Kekely, J Kořenek 2018 International Conference on Field-Programmable Technology (FPT), 234-237, 2018 | 12 | 2018 |
Trade-offs and progressive adoption of FPGA acceleration in network traffic monitoring L Kekely, V Puš, P Benáček, J Kořenek 2014 24th International Conference on Field Programmable Logic and …, 2014 | 11 | 2014 |
Multi buses: Theory and practical considerations of data bus width scaling in FPGAs L Kekely, J Cabal, V Puš, J Kořenek 2020 23rd Euromicro Conference on Digital System Design (DSD), 49-56, 2020 | 9 | 2020 |
CRC based hashing in FPGA using DSP blocks T Závodník, L Kekely, V Puš 17th International Symposium on Design and Diagnostics of Electronic …, 2014 | 8 | 2014 |
Hardwarová akcelerace aplikací pro monitorování a bezpečnost vysokorychlostních sítí L Kekely Vysoké učení technické v Brně. Fakulta informačních technologií, 2014 | 7 | 2014 |
Effective fpga architecture for general crc L Kekely, J Cabal, J Kořenek Architecture of Computing Systems–ARCS 2019: 32nd International Conference …, 2019 | 5 | 2019 |
General IDS acceleration for high-speed networks J Kučera, L Kekely, A Piecek, J Kořenek 2018 IEEE 36th International Conference on Computer Design (ICCD), 366-373, 2018 | 5 | 2018 |
Memory aware packet matching architecture for high-speed networks M Kekely, L Kekely, J Korenek 2018 21st Euromicro Conference on Digital System Design (DSD), 1-8, 2018 | 5 | 2018 |
Live demonstration of FPGA based networking accelerator for 200 Gbps data transfers L Kekely, J Kořenek NOMS 2018-2018 IEEE/IFIP Network Operations and Management Symposium, 1-3, 2018 | 4 | 2018 |
Increasing memory efficiency of hash-based pattern matching for high-speed networks T Fukač, J Matoušek, J Kořenek, L Kekely 2021 International Conference on Field-Programmable Technology (ICFPT), 1-9, 2021 | 3 | 2021 |
Demonstration of Full-Duplex Packet Transfers Over PCI Express with Sustained 200 Gbps Throughput L Kekely, M Špinler, Š Friedl, J Sikora, J Kořenek, V Puš 2018 International Conference on Field-Programmable Technology (FPT), 381-384, 2018 | 2 | 2018 |
FPGA Accelerated Change-Point Detection Method for 100Gb/s Networks T Cejka, L Kekely, P Benácek, RB Blazek, H Kubátová 9th Doctoral Workshop on Mathematical and Engineering Methods in Computer …, 2014 | 2 | 2014 |
Hardware Acceleration of Netwrok Security and Monitoring Applications L Kekely Proceedings of the 19th Conference STUDENT EEICT, 2013 | 2 | 2013 |