| Design of tunnel FET architectures for low power application using improved Chimp optimizer algorithm S Bhattacharya, SL Tripathi, VK Kamboj Engineering with Computers 39 (2), 1415-1458, 2023 | 17 | 2023 |
| Implementation of Low Power Inverter using Si1-xGex Pocket N & P-Channel Junction-Less Double Gate TFET S Bhattacharya, SL Tripathi Silicon 14 (14), 9129-9142, 2022 | 17 | 2022 |
| Automated garbage classification using deep learning S Bhattacharya, KB Sai, S Harikrishnan, H Peera, G Jyothi 2023 2nd International Conference on Applied Artificial Intelligence and …, 2023 | 8 | 2023 |
| A novel junction less dual gate tunnel FET with SiGe pocket for low power applications S Bhattacharya, SL Tripathi 2021 Devices for Integrated Circuit (DevIC), 479-483, 2021 | 7 | 2021 |
| Robotic car using nodemcu esp8266 wi-fi module GK Siddesh, RK Patel, S Maitra, S Bhattacharya, S Moosa, P Pavan 2023 9th International Conference on Advanced Computing and Communication …, 2023 | 4 | 2023 |
| Analysis of modified PIN tunnel FET architecture for applications in low power domain S Bhattacharya, SL Tripathi Materials Today: Proceedings 71, 377-382, 2022 | 2 | 2022 |
| Comparative study on 4-bit adders and multipliers with hardware implementation S Bhattacharya, SL Narasimhan 2024 7th International Conference on Devices, Circuits and Systems (ICDCS …, 2024 | 1 | 2024 |
| Design Transmission Gates Using Double-Gate Junctionless TFETs S Bhattacharya, SL Tripathi, GH Nayana Silicon, 1-14, 2024 | 1 | 2024 |
| Comparative Study on 45nm, 90nm and 180nm 6T SRAM Technologies NK NR, S Bhattacharya, SL Narasimhan, AR Naik 2024 7th International Conference on Devices, Circuits and Systems (ICDCS …, 2024 | | 2024 |
| Studies on the Behaviour of Partial Discharge in HT Cables S Bhattacharya | | 2013 |
Suman Lata TripathiProfessor, Lovely Professional UniversityBestätigte E-Mail-Adresse bei lpu.co.in