184QPS/W 64Mb/mm23D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System D Niu, S Li, Y Wang, W Han, Z Zhang, Y Guan, T Guan, F Sun, F Xue, ... 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 68 | 2022 |
COMB-MCM: Computing-on-memory-boundary NN processor with bipolar bitwise sparsity optimization for scalable multi-chiplet-module edge machine learning H Zhu, B Jiao, J Zhang, X Jia, Y Wang, T Guan, S Wang, D Niu, H Zheng, ... 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 37 | 2022 |
Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network S Li, D Niu, Y Wang, W Han, Z Zhang, T Guan, Y Guan, H Liu, L Huang, ... Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 28 | 2022 |
Recursive binary neural network training model for efficient usage of on-chip memory T Guan, P Liu, X Zeng, M Kim, M Seok IEEE Transactions on Circuits and Systems I: Regular Papers 66 (7), 2593-2605, 2019 | 14 | 2019 |
Recursive binary neural network learning model with 2.28 b/weight storage requirement T Guan, X Zeng, M Seok arXiv preprint arXiv:1709.05306, 2017 | 14 | 2017 |
184qps/w 64mb/mm 2 3d logic-to-dram hybrid bonding with process-near-memory engine for recommendation system. In 2022 IEEE International Solid-State Circuits Conference (ISSCC) D Niu, S Li, Y Wang, W Han, Z Zhang, Y Guan, T Guan, F Sun, F Xue, ... IEEE, 2022 | 7 | 2022 |
Extending memory capacity of neural associative memory based on recursive synaptic bit reuse T Guan, X Zeng, M Seok Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 7 | 2017 |
OpSparse: a highly optimized framework for sparse general matrix multiplication on GPUs Z Du, Y Guan, T Guan, D Niu, L Huang, H Zheng, Y Xie IEEE Access 10, 85960-85974, 2022 | 6 | 2022 |
Computation unit, related apparatus, and method G Yijin, F Sun, LUO Junwen, H Li, W Bangyan, G Tianchan, Y Zhang US Patent App. 17/510,217, 2022 | 5 | 2022 |
Enabling high-quality uncertainty quantification in a pim designed for bayesian neural network X Li, B Wu, G Sun, Z Zhang, Z Yuan, R Wang, R Huang, D Niu, H Zheng, ... 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 5 | 2022 |
Neural network based seizure detection system using raw EEG data T Guan, X Zeng, L Huang, M Seok 2016 International SoC design conference (ISOCC), 211-212, 2016 | 5 | 2016 |
Highly flexible WBAN transmit-receive system based on USRP T Guan, J Han, X Zeng 2013 IEEE 10th International Conference on ASIC, 1-4, 2013 | 3 | 2013 |
System for graph node sampling and method implemented by computer G Tianchan, D Niu, S Li, H Zheng US Patent 12,147,474, 2024 | 2 | 2024 |
Accelerating Distributed GNN Training by Codes Y Wang, T Guan, D Niu, Q Zou, H Zheng, CJR Shi, Y Xie IEEE Transactions on Parallel and Distributed Systems, 2023 | 2 | 2023 |
Accelerating cpu-based sparse general matrix multiplication with binary row merging Z Du, Y Guan, T Guan, D Niu, H Zheng, Y Xie IEEE Access 10, 79237-79248, 2022 | 2 | 2022 |
Recursive synaptic bit reuse: An efficient way to increase memory capacity in associative memory T Guan, X Zeng, M Seok IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (4), 757-768, 2018 | 2 | 2018 |
Computing system and memory sharing method for computing system G Tianchan, D Niu, G Yijin, H Zheng US Patent App. 18/322,954, 2024 | 1 | 2024 |
Three-dimensional stacked processing systems D Niu, W Han, G Tianchan, Y Wang, S Li, H Zheng US Patent App. 18/027,074, 2023 | 1 | 2023 |
Graph neural network accelerator with negative sampling G Tianchan, S Li, H Liu, H Zheng US Patent App. 17/574,528, 2023 | 1 | 2023 |
Programmable access engine architecture for graph neural network and graph application H Liu, S Li, G Tianchan, H Zheng US Patent App. 17/574,519, 2023 | 1 | 2023 |