An efficient hybrid I/O caching architecture using heterogeneous SSDs R Salkhordeh, M Hadizadeh, H Asadi IEEE Transactions on Parallel and Distributed Systems 30 (6), 1238-1250, 2018 | 14 | 2018 |
STAIR: High reliable STT-MRAM aware multi-level I/O cache architecture by adaptive ECC allocation M Hadizadeh, E Cheshmikhani, H Asadi 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020 | 11 | 2020 |
CoPA: Cold page awakening to overcome retention failures in STT-MRAM based i/O buffers M Hadizadeh, E Cheshmikhani, M Rahmanpour, O Mutlu, H Asadi IEEE Transactions on Parallel and Distributed Systems 33 (10), 2304-2317, 2021 | 7 | 2021 |
Improving Hybrid Multi-Level I/O Cache Lifetime Using Conservative Cache Management M Hadizadeh, R Salkhordeh, H Asadi Journal of Soft Computing and Information Technology 9 (2), 165-177, 2020 | | 2020 |