| MAPS: an integrated framework for MPSoC application parallelization J Ceng, J Castrillón, W Sheng, H Scharwächter, R Leupers, G Ascheid, ... Proceedings of the 45th annual Design Automation Conference, 754-759, 2008 | 177 | 2008 |
| Execution time estimation method and device T Isshiki, H Kunieda, N Kobayashi US Patent 8,448,140, 2013 | 50 | 2013 |
| Program processing device, parallel processing program, program processing method, parallel processing compiler, recording medium containing the parallel processing compiler … T Isshiki, H Kunieda US Patent 8,234,635, 2012 | 41 | 2012 |
| Scalable VLSI architectures for lattice structure-based discrete wavelet transform JT Kim, YH Lee, T Isshiki, H Kunieda IEEE transactions on circuits and systems II: Analog and digital signal …, 1998 | 41 | 1998 |
| Fingerprint authentication on touch sensor using phase-only correlation method N Shabrina, T Isshiki, H Kunieda 2016 7th International conference of information and communication …, 2016 | 37 | 2016 |
| A multiprocessor SoC architecture with efficient communication infrastructure and advanced compiler support for easy application development MZ Urfianto, T Isshiki, AU Khan, D Li, H Kunieda IEICE Transactions on Fundamentals of Electronics, Communications and …, 2008 | 36 | 2008 |
| A hybrid method for fingerprint image quality calculation J Qi, D Abdurrachim, D Li, H Kunieda Fourth IEEE Workshop on Automatic Identification Advanced Technologies …, 2005 | 36 | 2005 |
| SIFT-based algorithm for fingerprint authentication on smartphone M Yamazaki, D Li, T Isshiki, H Kunieda 2015 6th International Conference of Information and Communication …, 2015 | 28 | 2015 |
| Adaptive sift-based algorithm for specific fingerprint verification R Zhou, SW Sin, D Li, T Isshiki, H Kunieda 2011 International Conference on Hand-Based Biometrics, 1-6, 2011 | 26 | 2011 |
| New FPGA architecture for bit-serial pipeline datapath A Ohta, T Isshiki, H Kunieda Proceedings. IEEE Symposium on FPGAs for Custom Computing Machines (Cat. No …, 1998 | 25 | 1998 |
| Switched capacitor circuits T Takebe, A Iwata, N Takahashi, H Kunieda Gendai Kogaku Publ., Tokyo, 1985 | 25 | 1985 |
| Trace-driven workload simulation method for Multiprocessor System-On-Chips T Isshiki, D Li, H Kunieda, T Isomura, K Satou Proceedings of the 46th Annual Design Automation Conference, 232-237, 2009 | 24 | 2009 |
| System for fingerprint authentication based of ridge shape H Kunieda, T Isshiki, D Li, T Otsuka, M Mostafa US Patent 7,035,444, 2006 | 21 | 2006 |
| Decomposition of task-level concurrency on C programs applied to the design of multiprocessor SoC MZ Urfianto, T Isshiki, AU Khan, D Li, H Kunieda IEICE Transactions on Fundamentals of Electronics, Communications and …, 2008 | 19 | 2008 |
| A fingerprint matching using minutia ridge shape for low cost match-on-card systems AS Rikin, D Li, T Isshiki, H Kunieda IEICE Transactions on Fundamentals of Electronics, Communications and …, 2005 | 19 | 2005 |
| Optimized communication and synchronization for embedded multiprocessors using ASIP methodology H Xiao, T Isshiki, D Li, H Kunieda, Y Nakase, S Kimura Information and Media Technologies 7 (4), 1331-1345, 2012 | 18 | 2012 |
| A new FPGA architecture for high performance bit-serial pipeline datapath A OHTA, T ISSHIKI, H KUNIEDA IEICE transactions on fundamentals of electronics, communications and …, 2000 | 16* | 2000 |
| An optimal scheduling method for parallel processing system of array architecture K Ito, T Iwata, H Kunieda Proceedings of ASP-DAC'97: Asia and South Pacific Design Automation …, 1997 | 15 | 1997 |
| Face focus coding under H. 263+ video coding standard T Adiono, T Isshiki, K Ito, T Ohtsuka, D Li, C Honsawek, H Kunieda IEEE APCCAS 2000. 2000 IEEE Asia-Pacific Conference on Circuits and Systems …, 2000 | 14 | 2000 |
| Bits Truncation Adapteve Pyramid Algorithm for Motion Estimation of MPEG2 L Jiang, K Ito, H Kunieda IEICE transactions on fundamentals of electronics, communications and …, 1997 | 14 | 1997 |
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