Single-crystalline Si stacked array (STAR) NAND flash memory JG Yun, G Kim, JE Lee, Y Kim, WB Shim, JH Lee, H Shin, JD Lee, ... IEEE Transactions on Electron Devices 58 (4), 1006-1014, 2011 | 277 | 2011 |
RRAM for compute-in-memory: From inference to training S Yu, W Shim, X Peng, Y Luo IEEE Transactions on Circuits and Systems I: Regular Papers 68 (7), 2753-2765, 2021 | 98 | 2021 |
Technological design of 3D NAND-based compute-in-memory architecture for GB-scale deep neural network W Shim, S Yu IEEE Electron Device Letters 42 (2), 160-163, 2020 | 50 | 2020 |
Two-step write–verify scheme and impact of the read noise in multilevel RRAM-based inference engine W Shim, J Seo, S Yu Semiconductor Science and Technology 35 (11), 115026, 2020 | 47 | 2020 |
Drain–erase scheme in ferroelectric field-effect transistor—Part I: Device characterization P Wang, Z Wang, W Shim, J Hur, S Datta, AI Khan, S Yu IEEE Transactions on Electron Devices 67 (3), 955-961, 2020 | 42 | 2020 |
Investigation of read disturb and bipolar read scheme on multilevel RRAM-based deep learning inference engine W Shim, Y Luo, JS Seo, S Yu IEEE Transactions on Electron Devices 67 (6), 2318-2323, 2020 | 40 | 2020 |
Ferroelectric HfO2-based synaptic devices: recent trends and prospects S Yu, J Hur, YC Luo, W Shim, G Choe, P Wang Semiconductor Science and Technology 36 (10), 104001, 2021 | 38 | 2021 |
Drain-erase scheme in ferroelectric field effect transistor—Part II: 3-D-NAND architecture for in-memory computing P Wang, W Shim, Z Wang, J Hur, S Datta, AI Khan, S Yu IEEE Transactions on Electron Devices 67 (3), 962-967, 2020 | 38 | 2020 |
3D stacked array having cut-off gate line and fabrication method thereof B Park, S Cho, WB Shim US Patent 8,786,004, 2014 | 36 | 2014 |
Impact of read disturb on multilevel RRAM based inference engine: Experiments and model prediction W Shim, Y Luo, J Seo, S Yu 2020 IEEE International Reliability Physics Symposium (IRPS), 1-5, 2020 | 32 | 2020 |
Benchmarking monolithic 3D integration for compute-in-memory accelerators: overcoming ADC bottlenecks and maintaining scalability to 7nm or beyond X Peng, W Chakraborty, A Kaul, W Shim, MS Bakir, S Datta, S Yu 2020 IEEE International Electron Devices Meeting (IEDM), 30.4. 1-30.4. 4, 2020 | 25 | 2020 |
Program/erase model of nitride-based NAND-type charge trap flash memories DH Kim, S Cho, DH Li, JG Yun, JH Lee, GS Lee, Y Kim, WB Shim, ... Japanese Journal of Applied Physics 49 (8R), 084301, 2010 | 22 | 2010 |
Temperature-resilient rram-based in-memory computing for dnn inference J Meng, W Shim, L Yang, I Yeo, D Fan, S Yu, J Seo IEEE Micro 42 (1), 89-98, 2021 | 20 | 2021 |
Impact of multilevel retention characteristics on RRAM based DNN inference engine W Shim, J Meng, X Peng, J Seo, S Yu 2021 IEEE International Reliability Physics Symposium (IRPS), 1-4, 2021 | 20 | 2021 |
Impact of random phase distribution in ferroelectric transistors-based 3-D NAND architecture on in-memory computing G Choe, W Shim, P Wang, J Hur, AI Khan, S Yu IEEE Transactions on Electron Devices 68 (5), 2543-2548, 2021 | 19 | 2021 |
Ferroelectric field-effect transistor-based 3-D NAND architecture for energy-efficient on-chip training accelerator W Shim, S Yu IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 7 …, 2021 | 15 | 2021 |
A Vertical 4-Bit SONOS Flash Memory and a Unique 3-D Vertical nor Array Structure Y Kim, IH Park, S Cho, JG Yun, JH Lee, DH Kim, GS Lee, SH Park, ... IEEE transactions on nanotechnology 9 (1), 70-77, 2009 | 15 | 2009 |
Nonvolatile memory device, erase method thereof and memory system including the same W Shim US Patent 9,514,828, 2016 | 14 | 2016 |
Compute-in-memory: From device innovation to 3D system integration S Yu, W Shim, J Hur, Y Luo, G Choe, W Li, A Lu, X Peng ESSDERC 2021-IEEE 51st European Solid-State Device Research Conference …, 2021 | 13 | 2021 |
Architectural design of 3D NAND flash based compute-in-memory for inference engine W Shim, H Jiang, X Peng, S Yu Proceedings of the International Symposium on Memory Systems, 77-85, 2020 | 13 | 2020 |