MOSFETs With Self-Aligned InAs Source/Drain Formed by MEE RegrowthU Singisetti, MA Wistey, GJ Burek, AK Baraskar, BJ Thibeault, ...
IEEE Electron Device Letters 30 (11), 1128-1130, 2009
116 2009 Memory hole size variation in a 3D stacked memory L Pang, A Baraskar, Y Zhang, Y Dong
US Patent 9,812,462, 2017
90 2017 Ultralow resistance, nonalloyed Ohmic contacts to n-InGaAs AK Baraskar, MA Wistey, V Jain, U Singisetti, G Burek, BJ Thibeault, ...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 2009
75 2009 Lower limits to metal-semiconductor contact resistance: Theoretical models and experimental data A Baraskar, AC Gossard, MJW Rodwell
Journal of Applied Physics 114 (15), 2013
68 2013 InGaAs channel MOSFET with self‐aligned source/drain MBE regrowth technology U Singisetti, MA Wistey, GJ Burek, E Arkun, AK Baraskar, Y Sun, ...
physica status solidi c 6 (6), 1394-1398, 2009
55 2009 Ultra low contact resistivities for CMOS beyond 10-nm node Z Zhang, SO Koswatta, SW Bedell, A Baraskar, M Guillorn, ...
IEEE electron device letters 34 (6), 723-725, 2013
54 2013 Full band calculations of the intrinsic lower limit of contact resistivity J Maassen, C Jeong, A Baraskar, M Rodwell, M Lundstrom
Applied Physics Letters 102 (11), 2013
51 2013 Effect of growth temperature on the magnetic, microwave, and cation inversion properties on NiFe2O4 thin films deposited by pulsed laser ablation deposition CN Chinnasamy, SD Yoon, A Yang, A Baraskar, C Vittoria, VG Harris
Journal of applied physics 101 (9), 2007
51 2007 Ex situ Ohmic contacts to n-InGaAs A Baraskar, MA Wistey, V Jain, E Lobisser, U Singisetti, G Burek, YJ Lee, ...
Journal of Vacuum Science & Technology B 28 (4), C5I7-C5I9, 2010
41 2010 First demonstration of high-Ge-content strained-Si1−x Gex (x=0.5) on insulator PMOS FinFETs with high hole mobility and aggressively scaled fin dimensions and … P Hashemi, K Balakrishnan, SU Engelmann, JA Ott, A Khakifirooz, ...
2014 IEEE International Electron Devices Meeting, 16.1. 1-16.1. 4, 2014
37 2014 1.0 THz fmax InP DHBTs in a refractory emitter and self-aligned base process for reduced base access resistance V Jain, JC Rode, HW Chiang, A Baraskar, E Lobisser, BJ Thibeault, ...
69th Device Research Conference, 271-272, 2011
36 2011 High-performance Si1−x Gex channel on insulator trigate PFETs featuring an implant-free process and aggressively-scaled fin and gate dimensions P Hashemi, M Kobayashi, A Majumdar, LA Yang, A Baraskar, ...
2013 Symposium on VLSI Circuits, T18-T19, 2013
34 2013 Functionalization of FeCo alloy nanoparticles with highly dielectric amorphous oxide coatings Q Nguyen, CN Chinnasamy, SD Yoon, S Sivasubramanian, T Sakai, ...
Journal of Applied Physics 103 (7), 2008
34 2008 InGaAs/InP DHBTs in a Dry-Etched Refractory Metal Emitter Process Demonstrating Simultaneous V Jain, E Lobisser, A Baraskar, BJ Thibeault, MJW Rodwell, Z Griffith, ...
IEEE Electron Device Letters 32 (1), 24-26, 2010
29 2010 Strained Si1−x Gex -on-insulator PMOS FinFETs with excellent sub-threshold leakage, extremely-high short-channel performance and source injection velocity for … P Hashemi, K Balakrishnan, A Majumdar, A Khakifirooz, W Kim, ...
2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014
28 2014 Multi-pass programming process for memory device which omits verify test in first program pass A Baraskar, CH Lu, V Diep, Y Dong
US Patent 10,811,109, 2020
26 2020 Three-dimensional memory device containing structurally reinforced pedestal channel portions and method of making thereof A Baraskar, N Hosoda, Y Zhang, RS Makala, H Tanaka, R Nakamura, ...
US Patent 10,115,730, 2018
23 2018 Methods for reusing substrates during manufacture of a bonded assembly including a logic die and a memory die A Baraskar, RS Makala, P Rabkin
US Patent 11,398,451, 2022
22 2022 High doping effects on in-situ Ohmic contacts to n-InAs A Baraskar, V Jain, MA Wistey, U Singisetti, YJ Lee, B Thibeault, ...
2010 22nd International Conference on Indium Phosphide and Related Materials …, 2010
22 2010 Three-dimensional memory device including a silicon-germanium source contact layer and method of making the same A Baraskar, RS Makala, P Rabkin
US Patent 11,322,509, 2022
20 2022