| Clock gating for power optimization in ASIC design cycle theory & practice. S Jairam, M Rao, J Srinivas, P Vishwanath, H Udayakumar, JC Rao ISLPED, 307-308, 2008 | 28 | 2008 |
| Clock gating effectiveness metrics: Applications to power optimization J Srinivas, M Rao, S Jairam, H Udayakumar, J Rao Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design …, 2009 | 12 | 2009 |
| Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approaches S Jairam, K Lata, SK Roy, N Bhat Electronics, Circuits and Systems, 2008. ICECS 2008. 15th IEEE International …, 2008 | 9 | 2008 |
| Design of gating and riser system for grate bar casting S Santhi, BR Surya, S Jairam, J Jhansi, PKS Subramanian Indian Foundry Journal 61 (1), 2015 | 5 | 2015 |
| A methodology for fast vector based power supply and substrate noise analyses SP Debnath, S Jairam, H Udaykumar VLSI Design, 2005. 18th International Conference on, 808-811, 2005 | 4 | 2005 |
| Clock gating approaches by IOEX graphs and cluster efficiency plots J Srinivas, S Jairam Proceedings of the Conference on Design, Automation and Test in Europe, 638-641, 2010 | 3 | 2010 |
| Formal Verification of a MEMS Based Adaptive Cruise Control System S Jairam, K Lata, SK Roy, N Bhat, IISI CEDT Proceedings of Modeling and Simulation of Micro Systems, 2008 | 3 | 2008 |
| Techniques for Early Package Closure in System-in-Packages SC Vaidyanathan, AM Brahme, S Jairam Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on …, 2008 | 3 | 2008 |
| Formal Verification of a MEMS Based Adaptive Cruise Control System S Jairam, S Roy, K Lata, N Bhat Nanotech 3, 611 - 614, 2008 | 3 | 2008 |
| Calibration Based Methods for Substrate Modeling and Noise Analysis for Mixed-Signal SoCsc SP Debnath, GP Kumar, S Jairam VLSI Design, 2007. Held jointly with 6th International Conference on …, 2007 | 2 | 2007 |
| Incremental optimization of power pads based on adjoint network sensitivity S Jairam, SK Roy Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on, 259-263, 2009 | 1 | 2009 |
| GyroCompiler: A Soft IP Model Synthesis and Analysis Framework for Design of MEMS Based Gyroscopes S Jairam, N Bhat VLSI Design, 2008. VLSID 2008. 21st International Conference on, 589-594, 2008 | 1 | 2008 |
| Clock gating for power optimization in ASIC S Jairam www. islped. org/X2008/Jairam. pdf, 2008 | 1 | 2008 |
| Towards a Unified Framework for Design of MEMS based VLSI Systems J Sukumar | | 2018 |
| A Compiler Based Approach for Design and Analysis of Gyroscopes S Jairam, N Bhat Journal of Computational and Theoretical Nanoscience 12 (11), 4842-4848, 2015 | | 2015 |
| On Analyzing MEMS Based Multiple Energy Domain VLSI Circuits S Jairam, N Bhat Journal of Computational and Theoretical Nanoscience 12 (11), 4459-4466, 2015 | | 2015 |
| General Co-Chairs A Chandrasekhar, D Gope, SV Subramanyam, SLN Murthy, B Mutnury, ... | | 2013 |
| System & RTL Low Power Design : Tutorial P Panda, S Das, S Jairam, A Ranjan, N Tripathi, S Narayan VLSI Design Conference, 2013 | | 2013 |
| An Approach to Yield Estimation of Gigascale SoCs S Jairam ASQED, 2012 | | 2012 |
| Formal Verification of Hybrid Automotive Systems S Jairam, S Roy, K Lata, N Bhat Motion Control, 2010 | | 2010 |