Folgen
Gerhard W Dueck
Gerhard W Dueck
Professor of Computer Science, University of New Brunswick
Bestätigte E-Mail-Adresse bei unb.ca
Titel
Zitiert von
Zitiert von
Jahr
A transformation based algorithm for reversible logic synthesis
DM Miller, D Maslov, GW Dueck
Proceedings of the 40th annual Design Automation Conference, 318-323, 2003
6922003
RevLib: An online resource for reversible functions and reversible circuits
R Wille, D Große, L Teuber, GW Dueck, R Drechsler
38th International Symposium on Multiple Valued Logic (ismvl 2008), 220-225, 2008
5972008
Quantum circuit simplification and level compaction
D Maslov, GW Dueck, DM Miller, C Negrevergne
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
3352008
Toffoli network synthesis with templates
D Maslov, GW Dueck, DM Miller
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
3022005
Reversible cascades with minimal garbage
D Maslov, GW Dueck
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004
2742004
Techniques for the synthesis of reversible Toffoli networks
D Maslov, GW Dueck, DM Miller
ACM Transactions on Design Automation of Electronic Systems (TODAES) 12 (4 …, 2007
2452007
Exact multiple-control Toffoli network synthesis with SAT techniques
D Große, R Wille, GW Dueck, R Drechsler
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009
2252009
Improved quantum cost for n-bit Toffoli gates
D Maslov, GW Dueck
Electronics Letters 39 (25), 1790-1791, 2003
1752003
Quantum circuit simplification using templates
D Maslov, C Young, DM Miller, GW Dueck
Design, Automation and Test in Europe, 1208-1213, 2005
1592005
Spectral techniques for reversible logic synthesis
DM Miller, GW Dueck
6th International Symposium on Representations and Methodology of Future …, 2003
1402003
Synthesis of Fredkin-Toffoli reversible networks
D Maslov, GW Dueck, DM Miller
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (6), 765-769, 2005
1342005
Garbage in reversible design of multiple output functions
D Maslov, GW Dueck
6th International Symposium on Representations and Methodology of Future …, 2003
1282003
A synthesis method for MVL reversible logic [multiple value logic]
DM Miller, GW Dueck, D Maslov
Proceedings. 34th international symposium on multiple-valued logic, 74-80, 2004
1012004
Synthesis of quantum multiple-valued circuits
DM Miller, D Maslov, GW Dueck
Journal of Multiple Valued Logic and Soft Computing 12 (5/6), 431, 2006
932006
Simplification of Toffoli networks via templates
D Maslov, GW Dueck, DM Miller
16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003 …, 2003
802003
A direct cover MVL minimization using the truncated sum
GW Dueck
Proceedings of the 17th IEEE International Symposium on Multiple-Valued …, 1987
751987
Fredkin/Toffoli templates for reversible logic synthesis
D Maslov, GW Dueck, DM Miller
ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003
742003
Reversible function synthesis with minimum garbage outputs
GW Dueck, D Maslov
6th International Symposium on Representations and Methodology of Future …, 2003
732003
Quantified synthesis of reversible logic
R Wille, HM Le, GW Dueck, D Große
Proceedings of the conference on Design, automation and test in Europe, 1015 …, 2008
722008
Exact SAT-based Toffoli network synthesis
D Große, X Chen, GW Dueck, R Drechsler
Proceedings of the 17th ACM Great Lakes symposium on VLSI, 96-101, 2007
632007
Das System kann den Vorgang jetzt nicht ausführen. Versuchen Sie es später erneut.
Artikel 1–20