| Multi-objective mapping for mesh-based NoC architectures G Ascia, V Catania, M Palesi Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware …, 2004 | 302 | 2004 |
| Implementation and analysis of a new selection strategy for adaptive routing in networks-on-chip G Ascia, V Catania, M Palesi, D Patti IEEE transactions on computers 57 (6), 809-820, 2008 | 288 | 2008 |
| Efficient design space exploration for application specific systems-on-a-chip G Ascia, V Catania, AG Di Nuovo, M Palesi, D Patti Journal of Systems Architecture 53 (10), 733-750, 2007 | 127 | 2007 |
| Data encoding schemes in networks on chip M Palesi, G Ascia, F Fazzino, V Catania IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 107 | 2011 |
| VLSI hardware architecture for complex fuzzy systems G Ascia, V Catania, M Russo IEEE Transactions on Fuzzy Systems 7 (5), 553-570, 1999 | 93 | 1999 |
| A GA-based design space exploration framework for parameterized system-on-a-chip platforms G Ascia, V Catania, M Palesi IEEE Transactions on Evolutionary Computation 8 (4), 329-346, 2004 | 83 | 2004 |
| Neighbors-on-path: A new selection strategy for on-chip networks G Ascia, V Catania, M Palesi, D Patti 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia, 79-84, 2006 | 74* | 2006 |
| A data dependent approach to instruction level power estimation D Sarta, D Trifone, G Ascia Proceedings IEEE Alessandro Volta Memorial Workshop on Low-Power Design, 182-190, 1999 | 74 | 1999 |
| A VLSI fuzzy expert system for real-time traffic control in ATM networks G Ascia, V Catania, G Ficili, S Palazzo, D Panno IEEE Transactions on Fuzzy Systems 5 (1), 20-31, 1997 | 68 | 1997 |
| A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip. G Ascia, V Catania, M Palesi J. Univers. Comput. Sci. 12 (4), 370-394, 2006 | 63 | 2006 |
| EPIC-Explorer: A Parameterized VLIW-based Platform Framework for Design Space Exploration. G Ascia, V Catania, M Palesi, D Patti ESTImedia, 65-72, 2003 | 56 | 2003 |
| Mapping cores on network-on-chip G Ascia, V Catania, M Palesi International Journal of Computational Intelligence Research 1 (1), 109-126, 2005 | 55 | 2005 |
| A survey on deep learning hardware accelerators for heterogeneous hpc platforms C Silvano, D Ielmini, F Ferrandi, L Fiorin, S Curzel, L Benini, F Conti, ... arXiv preprint arXiv:2306.15552, 2023 | 46 | 2023 |
| A multiobjective genetic approach for system-level exploration in parameterized systems-on-a-chip G Ascia, V Catania, M Palesi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005 | 42 | 2005 |
| Performance evaluation of efficient multi-objective evolutionary algorithms for design space exploration of embedded computer systems G Ascia, V Catania, AG Di Nuovo, M Palesi, D Patti Applied Soft Computing 11 (1), 382-398, 2011 | 38 | 2011 |
| Fuzzy decision making in embedded system design AG Di Nuovo, M Palesi, D Patti, G Ascia, V Catania Proceedings of the 4th international conference on hardware/software …, 2006 | 38 | 2006 |
| An evolutionary approach to network-on-chip mapping problem G Ascia, V Catania, M Palesi 2005 IEEE Congress on Evolutionary Computation 1, 112-119, 2005 | 38 | 2005 |
| An adaptive transmitting power technique for energy efficient mm-wave wireless NoCs A Mineo, M Palesi, G Ascia, V Catania 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 33 | 2014 |
| Parameterised system design based on genetic algorithms G Ascia, V Catania, M Palesi Proceedings of the Ninth International Symposium on Hardware/Software …, 2001 | 33 | 2001 |
| Rule-driven VLSI fuzzy processor G Ascia, V Catania, M Russo, L Vita IEEE micro 16 (3), 62-74, 1996 | 33 | 1996 |
