A practical superhydrophilic self cleaning and antireflective surface for outdoor photovoltaic applications J Son, S Kundu, LK Verma, M Sakhuja, AJ Danner, CS Bhatia, H Yang
Solar Energy Materials and Solar Cells 98, 46-51, 2012
234 2012 Understanding the role of nitrogen in plasma-assisted surface modification of magnetic recording media with and without ultrathin carbon overcoats N Dwivedi, RJ Yeo, N Satyanarayana, S Kundu, S Tripathy, CS Bhatia
Scientific reports 5 (1), 7772, 2015
184 2015 SOT-MRAM 300mm integration for low power and ultrafast embedded memories K Garello, F Yasin, S Couet, L Souriau, J Swerts, S Rao, S Van Beek, ...
2018 IEEE symposium on VLSI Circuits, 81-82, 2018
180 2018 Highly scaled ruthenium interconnects S Dutta, S Kundu, A Gupta, G Jamieson, JFG Granados, J Bömmels, ...
IEEE Electron Device Letters 38 (7), 949-951, 2017
91 2017 Enablement of STT-MRAM as last level cache for the high performance computing domain at the 5nm node S Sakhare, M Perumkunnil, TH Bao, S Rao, W Kim, D Crotti, F Yasin, ...
2018 IEEE International Electron Devices Meeting (IEDM), 18.3. 1-18.3. 4, 2018
76 2018 Ovonic Threshold‐Switching Gex y S Clima, D Garbin, K Opsomer, NS Avasarala, W Devulder, I Shlyakhov, ...
physica status solidi (RRL)–Rapid Research Letters 14 (5), 1900672, 2020
72 2020 Sub-100 nm2 Cobalt Interconnects S Dutta, S Beyne, A Gupta, S Kundu, S Van Elshocht, H Bender, ...
IEEE Electron Device Letters 39 (5), 731-734, 2018
72 2018 Thermally stable integrated Se-based OTS selectors with >20 MA/cm2 current drive, >3.103 half-bias nonlinearity, tunable threshold voltage and excellent … B Govoreanu, GL Donadio, K Opsomer, W Devulder, VV Afanas' ev, ...
2017 Symposium on VLSI Technology, T92-T93, 2017
70 2017 High-aspect-ratio ruthenium lines for buried power rail A Gupta, S Kundu, L Teugels, J Bommels, C Adelmann, N Heylen, ...
2018 IEEE International Interconnect Technology Conference (IITC), 4-6, 2018
63 2018 Tailoring IGZO-TFT architecture for capacitorless DRAM, demonstrating > 103 s retention, >1011 cycles endurance and Lg scalability down to 14nm A Belmonte, H Oh, S Subhechha, N Rassoul, H Hody, H Dekkers, ...
2021 IEEE International Electron Devices Meeting (IEDM), 10.6. 1-10.6. 4, 2021
58 2021 First demonstration of sub-12 nm Lg gate last IGZO-TFTs with oxygen tunnel architecture for front gate devices S Subhechha, N Rassoul, A Belmonte, R Delhougne, K Banerjee, ...
2021 Symposium on VLSI Technology, 1-2, 2021
52 2021 Half-threshold bias Ioff reduction down to nA range of thermally and electrically stable high-performance integrated OTS selector, obtained by Se enrichment and N … NS Avasarala, GL Donadio, T Witters, K Opsomer, B Govoreanu, A Fantini, ...
2018 IEEE Symposium on VLSI Technology, 209-210, 2018
39 2018 Atomistic investigation of the electronic structure, thermal properties and conduction defects in Ge-rich Gex Se1−x materials for selector applications S Clima, B Govoreanu, K Opsomer, A Velea, NS Avasarala, W Devulder, ...
2017 IEEE International Electron Devices Meeting (IEDM), 4.1. 1-4.1. 4, 2017
35 2017 Solving the BEOL compatibility challenge of top-pinned magnetic tunnel junction stacks J Swerts, E Liu, S Couet, S Mertens, S Rao, W Kim, K Garello, L Souriau, ...
2017 IEEE International Electron Devices Meeting (IEDM), 38.6. 1-38.6. 4, 2017
33 2017 Magnonic Band Structure in Vertical Meander-Shaped G Gubbiotti, A Sadovnikov, E Beginin, S Nikitov, D Wan, A Gupta, ...
Physical Review Applied 15 (1), 014061, 2021
31 2021 Enhanced tribological, corrosion, and microstructural properties of an ultrathin (< 2 nm) silicon nitride/carbon bilayer overcoat for high density magnetic storage RJ Yeo, N Dwivedi, E Rismani, N Satyanarayana, S Kundu, ...
ACS Applied Materials & Interfaces 6 (12), 9376-9385, 2014
31 2014 2018 ieee symposium on vlsi circuits K Garello, F Yasin, S Couet, L Souriau, J Swerts, S Rao, S Van Beek, ...
IEEE, 2018
30 2018 Lateral displacement induced disorder in L1 0 N Gaur, S Kundu, SN Piramanayagam, SL Maurer, HK Tan, SK Wong, ...
Scientific reports 3 (1), 1907, 2013
30 2013 Deterministic and field-free voltage-controlled MRAM for high performance and low power applications YC Wu, W Kim, K Garello, F Yasin, G Jayakumar, S Couet, R Carpenter, ...
2020 IEEE Symposium on VLSI Technology, 1-2, 2020
28 2020 Alternative metals: from ab initio screening to calibrated narrow line models C Adelmann, K Sankaran, S Dutta, A Gupta, S Kundu, G Jamieson, ...
2018 IEEE International Interconnect Technology Conference (IITC), 154-156, 2018
28 2018 