Παρακολούθηση
Daniel R. Johnson
Daniel R. Johnson
NVIDIA
Η διεύθυνση ηλεκτρονικού ταχυδρομείου έχει επαληθευτεί στον τομέα nvidia.com
Τίτλος
Παρατίθεται από
Παρατίθεται από
Έτος
Energy-efficient mechanisms for managing thread context in throughput processors
M Gebhart, DR Johnson, D Tarjan, SW Keckler, WJ Dally, E Lindholm, ...
Proceedings of the 38th annual international symposium on Computer …, 2011
3542011
Rigel: An architecture and scalable programming interface for a 1000-core accelerator
JH Kelm, DR Johnson, MR Johnson, NC Crago, W Tuohy, A Mahesri, ...
Proceedings of the 36th annual international symposium on Computer …, 2009
2062009
Goldmine: Automatic assertion generation using data mining and static analysis
S Vasudevan, D Sheridan, S Patel, D Tcheng, B Tuohy, D Johnson
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
2012010
Scaling the power wall: a path to exascale
O Villa, DR Johnson, M Oconnor, E Bolotin, D Nellans, J Luitjens, ...
SC'14: Proceedings of the International Conference for High Performance …, 2014
1872014
Flexible software profiling of gpu architectures
M Stephenson, SK Sastry Hari, Y Lee, E Ebrahimi, DR Johnson, ...
Proceedings of the 42nd Annual International Symposium on Computer …, 2015
1362015
Architecting an energy-efficient dram system for gpus
N Chatterjee, M O’Connor, D Lee, DR Johnson, SW Keckler, M Rhu, ...
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
1202017
Priority-based cache allocation in throughput processors
D Li, M Rhu, DR Johnson, M O'Connor, M Erez, D Burger, DS Fussell, ...
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
1192015
Cohesion: a hybrid memory model for accelerators
JH Kelm, DR Johnson, W Tuohy, SS Lumetta, SJ Patel
Proceedings of the 37th annual international symposium on Computer …, 2010
732010
A variable warp size architecture
TG Rogers, DR Johnson, M O'Connor, SW Keckler
ACM SIGARCH Computer Architecture News 43 (3S), 489-501, 2015
632015
Two-level scheduler for multi-threaded processing
WJ Dally, SW Keckler, D Tarjan, JE Lindholm, MA Gebhart, DR Johnson
US Patent 8,732,711, 2014
602014
A hierarchical thread scheduler and register file for energy-efficient throughput processors
M Gebhart, DR Johnson, D Tarjan, SW Keckler, WJ Dally, E Lindholm, ...
ACM Transactions on Computer Systems (TOCS) 30 (2), 1-38, 2012
582012
Tradeoffs in designing accelerator architectures for visual computing
A Mahesri, D Johnson, N Crago, SJ Patel
2008 41st IEEE/ACM International Symposium on Microarchitecture, 164-175, 2008
572008
Rigel: A 1,024-core single-chip accelerator architecture
D Johnson, M Johnson, J Kelm, W Tuohy, S Lumetta, S Patel
IEEE Micro 31 (4), 30-41, 2011
512011
Cohesion: An adaptive hybrid memory model for accelerators
JH Kelm, DR Johnson, W Tuohy, SS Lumetta, SJ Patel
IEEE micro 31 (1), 42-55, 2011
422011
A task-centric memory model for scalable accelerator architectures
JH Kelm, DR Johnson, SS Lumetta, MI Frank, SJ Patel
2009 18th International Conference on Parallel Architectures and Compilation …, 2009
332009
Patch memory system
JL Clemons, CC Cheng, DR Johnson, SW Keckler, I Frosio, T Yun-Ta
US Patent 9,934,153, 2018
282018
A patch memory system for image processing and computer vision
J Clemons, CC Cheng, I Frosio, D Johnson, SW Keckler
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
272016
System, method, and computer program product for prioritized access for multithreaded processing
DR Johnson, M Rhu, JM O'Connor, SW Keckler
US Patent App. 14/147,395, 2015
232015
Pitfalls of orion-based simulation
M Hayenga, DR Johnson, M Lipasti
ORION 35, 40-000, 2010
182010
Speculative reconvergence for improved SIMT efficiency
S Damani, DR Johnson, M Stephenson, SW Keckler, E Yan, M McKeown, ...
Proceedings of the 18th ACM/IEEE International Symposium on Code Generation …, 2020
152020
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