Sahand Salamat

Sahand Salamat

Google
Verified email at google.com
Cited by 807
FPGAs RTL Design Machine Learning
Youngsu Kwon

Youngsu Kwon

Google
Verified email at google.com
Cited by 749
Architect AI Semiconductor RTL Design
Vladimir Kornijcuk

Vladimir Kornijcuk

SK hynix
Verified email at sk.com
Cited by 520
RTL design processing in memory memory controller Versal ACAP DRAM integration
Ahmed Elhossini

Ahmed Elhossini

Virtek Vision
Verified email at virtekvision.com
Cited by 432
Computer Vision Computer Architecture Reconfigurable Architectures RTL Design FPGA
Peng Peng

Peng Peng

Sr Staff Development Engineer, Seagate Technology
Verified email at me.umn.edu
Cited by 333
Circuit design RTL design sensing data acquisition
Muhammad Faisal Iqbal

Muhammad Faisal Iqbal

Aql Tech Solutions, Islamabad, Pakistan
Verified email at utexas.edu
Cited by 247
Computer Architecture RTL Design Verification
Masoud Zamani

Masoud Zamani

Senior Staff Engineer/Manager, Qualcomm Inc.
Verified email at qti.qualcomm.com
Cited by 193
Digital ASIC Design RTL Design
Naman Maheshwari

Naman Maheshwari

CPU Design at NVIDIA
Verified email at nvidia.com
Cited by 187
Computer Architecture and Microarchitecture RTL Design Low-Power Computing and Emerging … System-on-Chip Design
Jeonghoo Lee

Jeonghoo Lee

Synopsys
Verified email at synopsys.com
Cited by 129
Physical implementation RTL design SOC architecture
Md Sami Ul Islam Sami

Md Sami Ul Islam Sami

University of Florida, Florida Institute for Cybersecurity (FICS)
Verified email at ufl.edu
Cited by 116
Hardware Security Secure SoC Design VLSI RTL Design Verification
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