| Anton 3: twenty microseconds of molecular dynamics simulation before lunch DE Shaw, PJ Adams, A Azaria, JA Bank, B Batson, A Bell, M Bergdorf, ... Proceedings of the International Conference for High Performance Computing …, 2021 | 187 | 2021 |
| Scalable, accurate multicore simulation in the 1000-core era M Lis, P Ren, MH Cho, KS Shim, CW Fletcher, O Khan, S Devadas (IEEE ISPASS) IEEE International Symposium on Performance Analysis of …, 2011 | 87 | 2011 |
| DARSIM: a parallel cycle-level NoC simulator M Lis, KS Shim, MH Cho, P Ren, O Khan, S Devadas | 85 | 2010 |
| Hornet: A cycle-level multicore simulator P Ren, M Lis, MH Cho, KS Shim, CW Fletcher, O Khan, N Zheng, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 83 | 2012 |
| Static virtual channel allocation in oblivious routing KS Shim, MH Cho, M Kinsy, T Wen, M Lis, GE Suh, S Devadas 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 38-43, 2009 | 61 | 2009 |
| Oblivious routing in on-chip bandwidth-adaptive networks MH Cho, M Lis, KS Shim, M Kinsy, T Wen, S Devadas 2009 18th International Conference on Parallel Architectures and Compilation …, 2009 | 51 | 2009 |
| Execution migration S Devadas, O Khan, M Lis, KS Shim, MH Cho US Patent 8,904,154, 2014 | 30 | 2014 |
| Memory coherence in the age of multicores M Lis, KS Shim, MH Cho, S Devadas 2011 IEEE 29th International Conference on Computer Design (ICCD), 1-8, 2011 | 30 | 2011 |
| Optimal and heuristic application-aware oblivious routing MA Kinsy, MH Cho, KS Shim, M Lis, GE Suh, S Devadas IEEE Transactions on Computers 62 (1), 59-73, 2011 | 29 | 2011 |
| Deadlock-free fine-grained thread migration MH Cho, KS Shim, M Lis, O Khan, S Devadas Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on …, 2011 | 28 | 2011 |
| Path-based, randomized, oblivious, minimal routing MH Cho, M Lis, KS Shim, M Kinsy, S Devadas Proceedings of the 2nd International Workshop on Network on Chip …, 2009 | 27 | 2009 |
| Thread migration prediction for distributed shared caches KS Shim, M Lis, O Khan, S Devadas IEEE Computer Architecture Letters 13 (1), 53-56, 2012 | 22 | 2012 |
| Library cache coherence KS Shim, MH Cho, M Lis, O Khan, S Devadas | 21 | 2011 |
| Directoryless shared memory coherence using execution migration M Lis, KS Shim, MH Cho, O Khan, S Devadas ACTA Press, 2011 | 19 | 2011 |
| Guaranteed in-order packet delivery using exclusive dynamic virtual channel allocation S Devadas, MH Cho, KS Shim, M Lis | 18 | 2009 |
| Hardware-level thread migration in a 110-core shared-memory multiprocessor M Lis, KS Shim, B Cho, I Lebedev, S Devadas 2013 IEEE Hot Chips 25 Symposium (HCS), 1-27, 2013 | 17 | 2013 |
| System-level optimizations for memory access in the execution migration machine (EM2) KS Shim, M Lis, MH Cho, O Khan, S Devadas CAOS, 2011 | 16 | 2011 |
| The execution migration machine: Directoryless shared-memory architecture KS Shim, M Lis, O Khan, S Devadas Computer 48 (9), 50-59, 2015 | 13 | 2015 |
| Brief announcement: distributed shared memory based on computation migration M Lis, KS Shim, MH Cho, CW Fletcher, M Kinsy, I Lebedev, O Khan, ... Proceedings of the twenty-third annual ACM symposium on Parallelism in …, 2011 | 13 | 2011 |
| Design tradeoffs for simplicity and efficient verification in the Execution Migration Machine KS Shim, M Lis, MH Cho, I Lebedev, S Devadas 2013 IEEE 31st International Conference on Computer Design (ICCD), 145-153, 2013 | 11 | 2013 |
