| Design a novel 1-bit full adder with hybrid logic for full-swing, area-efficiency and high-speed AA M Kathirvelu Analog Integrated Circuits and Signal Processing, 2023 | 2* | 2023 |
| Era of reversible logic based quantum computing on low power applications N Vidhya, V Seethalakshmi, A Arul, J Dhanasekar, N Vinodhini AIP Conference Proceedings 2764 (1), 2023 | 2 | 2023 |
| Hybrid Radix-4 SESA/SEDA Adders for Medical Image Processing L Sowmiya, SM Ramesh, SFD Shadrach, A Arul Journal of Electronics, Electromedical Engineering, and Medical Informatics …, 2024 | | 2024 |
| Low Power Adders for Efficient Image Processing Applications L Sowmiya, SM Ramesh, A Arul, M Kathirvelu International Research Journal on Advanced Engineering Hub (IRJAEH) 1 (01 …, 2023 | | 2023 |
| Low power and high speed level translator using Widlar topology NS AC, R Maheswar, A Arul, SM Ramesh 2023 Second International Conference on Electrical, Electronics, Information …, 2023 | | 2023 |
| DILTS: Dragonfly-inspired lazy task scheduling algorithm for efficient energy consumption control in IoT applications A Arul, M Kathirvelu Journal of Intelligent & Fuzzy Systems, 1-18, 2023 | | 2023 |
| Design and Implementation of High-Speed Low Power Bi-stable Circuits for Digital Circuits Applications A Arul, M Kathirvelu, V Parimala, D Ganeshkumar 2022 IEEE 2nd Mysore Sub Section International Conference (MysuruCon), 1-4, 2022 | | 2022 |
| Single Phase Online UPS Design Using Three Leg Converters R Ramesh, U Subathra, A Arul | | |
| Novel Digital Active Emi Filter Used In A Grid-Tied PV Microinverter Module M Ananthi, A Arul, R Ramesh | | |
| Derivation to the uniform distortion of the Mid-Treat Quantizer using JPEG2000 PG Scholar | | |
Kathirvelu MKPR Institute of Engineering & TechnologyVerified email at kpriet.ac.in