| FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo3 Framework A Rodríguez, J Valverde, J Portilla, A Otero, T Riesgo, E De la Torre Sensors 18 (6), 1877, 2018 | 107 | 2018 |
| Run-time reconfigurable MPSoC-based on-board processor for vision-based space navigation A Pérez, A Rodríguez, A Otero, DG Arjona, A Jiménez-Peralo, ... IEEE Access 8, 59891-59905, 2020 | 41 | 2020 |
| Scalable hardware-based on-board processing for run-time adaptive lossless hyperspectral compression A Rodriguez, L Santos, R Sarmiento, E De La Torre IEEE Access 7, 10644-10652, 2019 | 38 | 2019 |
| Hardware/software self-adaptation in CPS: the CERBERO project approach F Palumbo, T Fanni, C Sau, A Rodríguez, D Madroñal, K Desnos, ... Embedded Computer Systems: Architectures, Modeling, and Simulation: 19th …, 2019 | 21 | 2019 |
| Multi-grain reconfiguration for advanced adaptivity in cyber-physical systems T Fanni, A Rodríguez, C Sau, L Suriano, F Palumbo, L Raffo, E de la Torre 2018 International Conference on ReConFigurable Computing and FPGAs …, 2018 | 20 | 2018 |
| A unified hardware/software monitoring method for reconfigurable computing architectures using PAPI L Suriano, D Madroñal, A Rodríguez, E Juárez, C Sanz, E de la Torre 2018 13th International Symposium on Reconfigurable Communication-centric …, 2018 | 17 | 2018 |
| Execution modeling in self-aware FPGA-based architectures for efficient resource management A Rodríguez, J Valverde, C Castañares, J Portilla, E de la Torre, T Riesgo 2015 10th International Symposium on Reconfigurable Communication-centric …, 2015 | 17 | 2015 |
| Evolutionary computing and particle filtering: A hardware-based motion estimation system A Rodriguez, F Moreno IEEE Transactions on Computers 64 (11), 3140-3152, 2015 | 17 | 2015 |
| Analysis of a heterogeneous multi-core, multi-hw-accelerator-based system designed using PREESM and SDSoC L Suriano, A Rodriguez, K Desnos, M Pelcat, E de la Torre 2017 12th International Symposium on Reconfigurable Communication-centric …, 2017 | 16 | 2017 |
| Lossy hyperspectral image compression on a reconfigurable and fault-tolerant fpga-based adaptive computing platform Y Barrios, A Rodríguez, A Sánchez, A Pérez, S López, A Otero, ... Electronics 9 (10), 1576, 2020 | 14 | 2020 |
| DAMHSE: Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping L Suriano, F Arrestier, A Rodríguez, J Heulot, K Desnos, M Pelcat, ... Microprocessors and Microsystems 71, 102882, 2019 | 14 | 2019 |
| CERBERO: Cross-layer modEl-based fRamework for multi-oBjective dEsign of reconfigurable systems in unceRtain hybRid envirOnments: Invited paper: CERBERO teams from UniSS, UniCA … F Palumbo, T Fanni, C Sau, L Pulina, L Raffo, M Masin, E Shindin, ... Proceedings of the 16th ACM International Conference on Computing Frontiers …, 2019 | 13 | 2019 |
| Exploiting multi-level parallelism for run-time adaptive inverse kinematics on heterogeneous mpsocs L Suriano, A Otero, A Rodríguez, M Sánchez-Renedo, E De La Torre IEEE Access 8, 118707-118724, 2020 | 10 | 2020 |
| A dynamically adaptable bus architecture for trading-off among performance, consumption and dependability in Cyber-Physical Systems J Valverde, A Rodríguez, J Camarero, A Otero, J Portilla, E de la Torre, ... 2014 24th International Conference on Field Programmable Logic and …, 2014 | 10 | 2014 |
| Design of OpenCL-compatible multithreaded hardware accelerators with dynamic support for embedded FPGAs A Rodrıguez, J Valverde, E de la Torre 2015 International Conference on ReConFigurable Computing and FPGAs …, 2015 | 8 | 2015 |
| Dynamic management of multikernel multithread accelerators using dynamic partial reconfiguration A Rodríguez, J Valverde, E de la Torre, T Riesgo 2014 9th International Symposium on Reconfigurable and Communication-Centric …, 2014 | 8 | 2014 |
| Exploiting hardware-based data-parallel and multithreading models for smart edge computing in reconfigurable FPGAs A Rodríguez, A Otero, M Platzner, E de la Torre IEEE Transactions on Computers 71 (11), 2903-2914, 2021 | 5 | 2021 |
| Teaching hybrid HW/SW embedded system Design using FPGA-based devices A Rodríguez, J Portilla, E de la Torre, T Riesgo 2016 Conference on Design of Circuits and Integrated Systems (DCIS), 1-5, 2016 | 5 | 2016 |
| A dynamically adaptable image processing application trading off between high performance, consumption and dependability in real time J Valverde Alcalá, A Rodríguez Medina, J Mora de Sambricio, ... Industriales, 2014 | 5 | 2014 |
| MYRTUS: Multi-layer 360 dYnamic orchestration and interopeRable design environmenT for compute-continUum Systems F Palumbo, MK Zedda, T Fanni, A Bagnato, L Castello, J Castrillon, ... Proceedings of the 21st ACM International Conference on Computing Frontiers …, 2024 | 4 | 2024 |
Eduardo de la TorreUniversidad Politécnica de MadridVerified email at upm.es