| Inter-cluster thread-to-core mapping and DVFS on heterogeneous multi-cores BK Reddy, AK Singh, D Biswas, GV Merrett, BM Al-Hashimi IEEE Transactions on Multi-Scale Computing Systems 4 (3), 369-382, 2017 | 82 | 2017 |
| Energy-efficient run-time mapping and thread partitioning of concurrent OpenCL applications on CPU-GPU MPSoCs AK Singh, A Prakash, KR Basireddy, GV Merrett, BM Al-Hashimi ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-22, 2017 | 59 | 2017 |
| Dynamic energy and thermal management of multi-core mobile platforms: A survey AK Singh, S Dey, K McDonald-Maier, KR Basireddy, GV Merrett, ... IEEE Design & Test 37 (5), 25-33, 2020 | 50 | 2020 |
| Learning-based run-time power and energy management of multi/many-core systems: Current and future trends AK Singh, C Leech, BK Reddy, BM Al-Hashimi, GV Merrett Journal of Low Power Electronics 13 (3), 310-325, 2017 | 44 | 2017 |
| AdaMD: Adaptive mapping and DVFS for energy-efficient heterogeneous multicores KR Basireddy, AK Singh, BM Al-Hashimi, GV Merrett IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 43 | 2019 |
| Edgecoolingmode: An agent based thermal management mechanism for dvfs enabled heterogeneous mpsocs S Dey, EZ Guajardo, KR Basireddy, X Wang, AK Singh, ... 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 35 | 2019 |
| Empirical CPU power modelling and estimation in the gem5 simulator BK Reddy, MJ Walker, D Balsamo, S Diestelhorst, BM Al-Hashimi, ... 2017 27th International Symposium on Power and Timing Modeling, Optimization …, 2017 | 32 | 2017 |
| Predictive thermal management for energy-efficient execution of concurrent applications on heterogeneous multicores EW Wächter, C De Bellefroid, KR Basireddy, AK Singh, BM Al-Hashimi, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (6 …, 2019 | 29 | 2019 |
| Online concurrent workload classification for multi-core energy management KR Basireddy, A Singh, G Merrett, B Al-Hashimi IEEE Design, Automation & Test in Europe, Dresden, Germany, 621-624, 2018 | 24* | 2018 |
| Collaborative adaptation for energy-efficient heterogeneous mobile SoCs AK Singh, KR Basireddy, A Prakash, GV Merrett, BM Al-Hashimi IEEE Transactions on Computers 69 (2), 185-197, 2019 | 21 | 2019 |
| Workload-aware runtime energy management for HPC systems KR Basireddy, EW Wachter, BM Al-Hashimi, G Merrett 2018 International Conference on High Performance Computing & Simulation …, 2018 | 17 | 2018 |
| ITMD: Run-time management of concurrent multi-threaded applications on heterogeneous multi-cores BK Reddy, AK Singh, GV Merrett, BM Al-Hashimi Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 | 10* | 2017 |
| A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetry BK Reddy, S Sabbavarapu, A Acharyya 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 177-180, 2014 | 8 | 2014 |
| Active Cooling Technique for Efficient Heat Mitigation in 3D-ICs P Kaddi, BK Reddy, SG Singh 2014 27th International Conference on VLSI Design and 2014 13th …, 2014 | 8 | 2014 |
| Runtime energy management of concurrent applications for multi-core platforms KR Basireddy University of Southampton, 2019 | 5 | 2019 |
| A novel and unified digital ic design and automation methodology with reduced NRE cost and time-to-market BK Reddy, S Sabbavarapu, K Gupta, R Prabhat, A Acharyya, RA Shafik, ... 2013 International Symposium on Electronic System Design, 36-40, 2013 | 5 | 2013 |
| A New Dynamic Library Based IC Design Automation Methodology Using Functional Symmetry with NPN Class Representation Approach to Reduce NRE Costs and Time-to-Market S Sabbavarapu, BK Reddy, A Acharyya Electronic System Design (ISED), 2014 Fifth International Symposium on, 115-119, 2014 | 2 | 2014 |
| Degradation of Aqueous Organic Pollutants by Catalytic Nonthermal Plasma based Advanced Oxidation Process PMK Reddy Indian Institute of Technology Hyderabad, 2014 | 2 | 2014 |
| A novel physical synthesis methodology in the VLSI design automation by introducing dynamic library concept S Sabbavarapu, BK Reddy, R Prabhat, K Gupta, A Acharyya, RA Shafik, ... 2013 International Symposium on Electronic System Design, 103-107, 2013 | 2 | 2013 |
| Cut-less technology mapping using shannon factor graph with on-the-fly size reduction KR Basireddy, S Sabbavarapu, A Acharyya Journal of Low Power Electronics 14 (3), 448-457, 2018 | 1 | 2018 |
Geoff V MerrettProfessor of Electronic and Software Systems, University of SouthamptonVerified email at ecs.soton.ac.uk