| Parameterized posit arithmetic hardware generator R Chaurasiya, J Gustafson, R Shrestha, J Neudorfer, S Nambiar, K Niyogi, ... 2018 IEEE 36th International Conference on Computer Design (ICCD), 334-341, 2018 | 128 | 2018 |
| FPGA implementation of fractional-order chaotic systems DK Shah, RB Chaurasiya, VA Vyawahare, K Pichhode, MD Patil AEU-International Journal of Electronics and Communications 78, 245-257, 2017 | 65 | 2017 |
| Hardware-efficient and fast sensing-time maximum-minimum-eigenvalue-based spectrum sensor for cognitive radio network RB Chaurasiya, R Shrestha IEEE Transactions on Circuits and Systems I: Regular Papers 66 (11), 4448-4461, 2019 | 41 | 2019 |
| Fast sensing-time and hardware-efficient eigenvalue-based blind spectrum sensors for cognitive radio network RB Chaurasiya, R Shrestha IEEE Transactions on Circuits and Systems I: Regular Papers 67 (4), 1296-1308, 2019 | 31 | 2019 |
| A new hardware-efficient spectrum-sensor VLSI architecture for data-fusion-based cooperative cognitive-radio network RB Chaurasiya, R Shrestha IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (4), 760-773, 2021 | 17 | 2021 |
| FPGA implementation of efficient Vedic multiplier K Pichhode, MD Patil, D Shah, BC Rohit 2015 International Conference on Information Processing (ICIP), 565-570, 2015 | 17 | 2015 |
| Area-efficient and scalable data-fusion based cooperative spectrum sensor for cognitive radio RB Chaurasiya, R Shrestha IEEE Transactions on Circuits and Systems II: Express Briefs 68 (4), 1198-1202, 2020 | 14 | 2020 |
| FPGA implementation of SVPWM control technique for three phase induction motor drive using fixed point realization MD Patil, D Shah, A Kadam 2014 International Conference on Circuits, Systems, Communication and …, 2014 | 11 | 2014 |
| Design and ASIC-implementation of hardware-efficient cooperative spectrum-sensor for data fusion-based cognitive radio network RB Chaurasiya, R Shrestha IEEE Transactions on Consumer Electronics 68 (3), 221-235, 2022 | 10 | 2022 |
| Hardware-efficient VLSI architecture and ASIC implementation of GRCR-based cooperative spectrum sensor for cognitive-radio network RB Chaurasiya, R Shrestha IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (2), 166-176, 2021 | 8 | 2021 |
| Hardware-efficient ASIC implementation of eigenvalue based spectrum sensor reconfigurable-architecture for cooperative cognitive-radio network RB Chaurasiya, R Shrestha 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021 | 7 | 2021 |
| Hardware-efficient and low sensing-time VLSI-architecture of MED based spectrum sensor for cognitive radio RB Chaurasiya, R Shrestha 2019 IEEE International symposium on circuits and systems (ISCAS), 1-5, 2019 | 5 | 2019 |
| Vehicle parking system implementation using CPLD DK Shah, D Sen, S Goyal 2015 International Conference on Communication, Information & Computing …, 2015 | 5 | 2015 |
| Energy-preserving Indirect-feedback for Wireless Power Transfer S Sarma, R Shrestha, RB Chaurasiya arXiv preprint arXiv:2305.06996, 2023 | 1 | 2023 |
| Wireless Energy Consumption Tracking on Adhoc Network RBC Rohan Stanley, Ananya Iyer International Journal of Scientific and Research 6 (Issue 6), 12-7, 2016 | | 2016 |
| Hardware-Efficient ASIC Implementation of Eigenvalue based Spectrum Sensor Reconfigurable-Architecture for Cooperative Cognitive-Radio Network RB Chaurasiya | | |
| Hardware efficient vlsi algorithms and digital architectures of standalone and cooperative spectrum sensors for cognitive radio network RB Chaurasiya Mandi, 0 | | |
| Iot Based Cortic Pad For Sleep Analysis. R Vasappanavara, MA Iyer, MR Chaurasiya, MR Stanley | | |
Rahul ShresthaAssociate Professor, IIT MandiVerified email at iitmandi.ac.in