| TCG: A transitive closure graph-based representation for non-slicing floorplans JM Lin, YW Chang Proceedings of the 38th annual Design Automation Conference, 764-769, 2001 | 331 | 2001 |
| TCG-S: Orthogonal coupling of P*-admissible representations for general floorplans JM Lin, YW Chang Proceedings of the 39th Annual Design Automation Conference, 842-847, 2002 | 125 | 2002 |
| Effective and efficient approach for power reduction by using multi-bit flip-flops YT Shyu, JM Lin, CP Huang, CW Lin, YZ Lin, SJ Chang IEEE transactions on very large scale integration (vlsi) systems 21 (4), 624-635, 2012 | 92 | 2012 |
| TCG: A transitive closure graph-based representation for general floorplans JM Lin, YW Chang IEEE transactions on very large scale integration (VLSI) systems 13 (2), 288-292, 2005 | 81 | 2005 |
| Corner sequence-a P-admissible floorplan representation with a worst case linear-time packing scheme JM Lin, YW Chang, SP Lin IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (4), 679-686, 2003 | 75 | 2003 |
| Placement with symmetry constraints for analog layout design using TCG-S JM Lin, GM Wu, YW Chang, JH Chuang Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005 | 54 | 2005 |
| SKB-tree: a fixed-outline driven representation for modern floorplanning problems JM Lin, ZX Hung IEEE transactions on very large scale integration (VLSI) systems 20 (3), 473-484, 2011 | 50 | 2011 |
| Generic ILP-based approaches for time-multiplexed FPGA partitioning GM Wu, JM Lin, YW Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001 | 49 | 2001 |
| Mismatch-aware common-centroid placement for arbitrary-ratio capacitor arrays considering dummy capacitors CW Lin, JM Lin, YC Chiu, CP Huang, SJ Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 46 | 2012 |
| Common-centroid capacitor placement considering systematic and random mismatches in analog integrated circuits CW Lin, JM Lin, YC Chiu, CP Huang, SJ Chang Proceedings of the 48th Design Automation Conference, 528-533, 2011 | 39 | 2011 |
| Performance-driven analog placement considering boundary constraint CW Lin, JM Lin, CP Huang, SJ Chang Proceedings of the 47th Design Automation Conference, 292-297, 2010 | 33 | 2010 |
| A systematic design methodology of asynchronous SAR ADCs CP Huang, JM Lin, YT Shyu, SJ Chang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (5 …, 2015 | 32 | 2015 |
| Module placement with boundary constraints using B*-trees JM Lin, HE Yi, YW Chang IEE Proceedings-Circuits, Devices and Systems 149 (4), 251-256, 2002 | 32 | 2002 |
| UFO: Unified convex optimization algorithms for fixed-outline floorplanning considering pre-placed modules JM Lin, ZX Hung IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 27 | 2011 |
| Routability-driven placement algorithm for analog integrated circuits CW Lin, CC Lu, JM Lin, SJ Chang Proceedings of the 2012 ACM international symposium on International …, 2012 | 23 | 2012 |
| A fast thermal-aware fixed-outline floorplanning methodology based on analytical models JM Lin, TT Chen, YF Chang, WY Chang, YT Shyu, YJ Chang, JM Lu 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 20 | 2018 |
| F-FM: Fixed-outline floorplanning methodology for mixed-size modules considering voltage-island constraint JM Lin, JH Wu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 20 | 2014 |
| Dataflow-aware macro placement based on simulated evolution algorithm for mixed-size designs JM Lin, YL Deng, YC Yang, JJ Chen, PC Lu IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (5), 973-984, 2021 | 17 | 2021 |
| SAINT: Handling module folding and alignment in fixed-outline floorplans for 3D ICs JM Lin, PY Chiu, YF Chang 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-7, 2016 | 16 | 2016 |
| Voltage island-driven floorplanning considering level shifter placement JM Lin, WY Cheng, CL Lee, RCJ Hsu 17th Asia and South Pacific Design Automation Conference, 443-448, 2012 | 16 | 2012 |