Pramod Kumar Meher

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Basant Kumar MohantyProfessor, Electronics and Telecommunication Engineering, Sambalpur University Institute ofVerified email at suiit.ac.in
Jagdish PatraSwinburne University of Technology, Melbourne, AustraliaVerified email at swin.edu.au
Sang Yoon Parkinstitute for infocomm researchVerified email at i2r.a-star.edu.sg
Jiafeng XieDepartment of Electrical and Computer Engineering, Villanova UniversityVerified email at villanova.edu
Vinod A PrasadProfessor, Information Communication Technology, Singapore Institute of TechnologyVerified email at singaporetech.edu.sg
Swamy, M.N.S.Propfessor of Electrical and Computer Eng., Concordia UniversityVerified email at ece.concordia.ca
Javier VallsProfesor del Departamento de Ingeniería Electrónica de la Universidad Politécnica de ValenciaVerified email at eln.upv.es
Jridi MaherEnseignant chercheur, ISEN Yncrea OuestVerified email at isen-ouest.yncrea.fr
Xin LouShanghaiTech UniversityVerified email at shanghaitech.edu.cn
Prof. Gananath DashSambalpur UniversityVerified email at ieee.org
Prof. Ganapati Panda (G. Panda)C V Raman Global University-OdishaVerified email at cgu-odisha.ac.in
Mukesh Kumar RavalFormer Professor of Chemistry, Gangadhar Meher College, Sambalpur-768004, Orissa, IndiaVerified email at bsnl.in
Sudha NatarajanProfessor, School of Computing, SASTRA Deemed UniversityVerified email at cse.sastra.edu
Jeng-Shyang Pan (潘正祥)Nanjing University of Information Science and TechnologyVerified email at ieee.org
Yu PanHead of perception, Venti technologiesVerified email at ventitechnologies.com
Dwaipayan RaySenior Lead Engineer at QualcommVerified email at iitgn.ac.in
Nithin GeorgeIndian Institute of Technology GandhinagarVerified email at iitgn.ac.in
Jitendriya K SatapathyProfessor in Electrical Engineering, National Institute of Technology, Rourkela-769008, IndiaVerified email at nitrkl.ac.in
subhendu kumar SahooBITS Pilani HyderabadVerified email at hyderabad.bits-pilani.ac.in
Athanasios (Thanos) StouraitisKhalifa University, UAE, and University of Patras, GreeceVerified email at ku.ac.ae

Pramod Kumar Meher

C. V. Raman Global University, Bhubaneswar, India

Verified email at sandhaanlabs.in

Low-Power High-Performance and Reconfigurable Systems Table-based Computing and CORDIC Designs for


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50 years of CORDIC: Algorithms, architectures, and applications PK Meher, J Valls, TB Juang, K Sridharan, K Maharatna IEEE Transactions on Circuits and Systems I: Regular Papers 56 (9), 1893-1907, 2009	728	2009
FPGA realization of FIR filters by efficient and flexible systolization using distributed arithmetic PK Meher, S Chandrasekaran, A Amira IEEE transactions on signal processing 56 (7), 3009-3017, 2008	347	2008
Efficient integer DCT architectures for HEVC PK Meher, SY Park, BK Mohanty, KS Lim, C Yeo IEEE Transactions on Circuits and systems for Video Technology 24 (1), 168-178, 2013	242	2013
Efficient FPGA and ASIC realizations of a DA-based reconfigurable FIR digital filter SY Park, PK Meher IEEE Transactions on Circuits and Systems II: Express Briefs 61 (7), 511-515, 2014	223	2014
New approach to look-up-table design and memory-based realization of FIR digital filter PK Meher IEEE Transactions on Circuits and Systems I: Regular Papers 57 (3), 592-603, 2009	204	2009
A high-performance energy-efficient architecture for FIR adaptive filter based on new distributed arithmetic formulation of block LMS algorithm BK Mohanty, PK Meher IEEE transactions on signal processing 61 (4), 921-932, 2012	151	2012
Low-power, high-throughput, and low-area adaptive FIR filter based on distributed arithmetic SY Park, PK Meher IEEE Transactions on Circuits and Systems II: Express Briefs 60 (6), 346-350, 2013	145	2013
A high-performance FIR filter architecture for fixed and reconfigurable applications BK Mohanty, PK Meher IEEE transactions on very large scale integration (VLSI) systems 24 (2), 444-452, 2015	134	2015
FPGA implementation of orthogonal matching pursuit for compressive sensing reconstruction H Rabah, A Amira, BK Mohanty, S Almaadeed, PK Meher IEEE Transactions on very large scale integration (VLSI) Systems 23 (10 …, 2014	134	2014
Nonlinear channel equalization for wireless communication systems using Legendre neural networks JC Patra, PK Meher, G Chakraborty Signal Processing 89 (11), 2251-2262, 2009	127	2009
Hardware-efficient systolization of DA-based calculation of finite digital convolution PK Meher IEEE Transactions on Circuits and Systems II: Express Briefs 53 (8), 707-711, 2006	126	2006
Critical-path analysis and low-complexity implementation of the LMS adaptive algorithm PK Meher, SY Park IEEE Transactions on Circuits and Systems I: Regular Papers 61 (3), 778-788, 2013	106	2013
Efficient CORDIC algorithms and architectures for low area and high throughput implementation L Vachhani, K Sridharan, PK Meher IEEE Transactions on Circuits and Systems II: Express Briefs 56 (1), 61-65, 2009	106	2009
Memory efficient modular VLSI architecture for highthroughput and low-latency implementation of multilevel lifting 2-D DWT BK Mohanty, PK Meher IEEE Transactions on Signal processing 59 (5), 2072-2084, 2011	102	2011
Memory-Efficient High-Speed Convolution-based Generic Structure for Multilevel 2-D DWT BK Mohanty, PK Meher IEEE Transactions on Circuits and Systems for Video Technology 23 (2), 353-363, 2013	95	2013
Legendre-FLANN-based nonlinear channel equalization in wireless communication system JC Patra, WC Chin, PK Meher, G Chakraborty 2008 IEEE international conference on systems, man and cybernetics, 1826-1831, 2008	93	2008
Systolic and Super-Systolic Multipliers for Finite Field Based on Irreducible Trinomials PK Meher IEEE Transactions on Circuits and Systems I: Regular Papers 55 (4), 1031-1040, 2008	92	2008
An optimized lookup-table for the evaluation of sigmoid function for artificial neural networks PK Meher 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, 91-95, 2010	90	2010
High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic PK Meher, SY Park 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 428-433, 2011	89	2011
Area-delay-power efficient fixed-point LMS adaptive filter with low adaptation-delay PK Meher, SY Park IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 362-371, 2013	87	2013

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