Alex Nicolau

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Nikil DuttDistinguished Professor, CS, EECS & Cognitive Sciences, University of California, IrvineVerified email at uci.edu
Rajesh K. GuptaProfessor of Computer Science and Engineering, Halıcıoğlu Data Science Institute, UC San DiegoVerified email at ucsd.edu
Preeti Ranjan PandaProfessor in Computer Science and Engineering, Indian Institute of Technology DelhiVerified email at cse.iitd.ac.in
Arun KejariwalFacebook Inc.Verified email at acm.org
Alex AikenProfessor of Computer Science, Stanford UniversityVerified email at cs.stanford.edu
David PaduaProfessor Emeritus, University of Illinois at Urbana-ChampaignVerified email at illinois.edu
Nalini VenkatasubramanianProfessor of Computer Science, University of California, IrvineVerified email at uci.edu
Aviral ShrivastavaArizona State UniversityVerified email at asu.edu
Prabhat MishraProfessor, Univ. of Florida, IEEE Fellow, AAAS Fellow, ACM Distinguished MemberVerified email at ufl.edu
Jayram Moorkanikara NageswaranAmazon, Ex Brain CorporationVerified email at braincorporation.com
Hiroyuki TomiyamaRitsumeikan UniversityVerified email at fc.ritsumei.ac.jp
Luis Angel D. BathenIBM ResearchVerified email at uci.edu
Vijay GaneshProfessor, Georgia Institute of Technology, Atlanta, GA, USAVerified email at gatech.edu
Partha BiswasDevelopment manager, MathworksVerified email at mathworks.com
Kevin KarplusProfessor of Biomolecular Engineering, University of California, Santa CruzVerified email at soe.ucsc.edu
Mohammad Ali GhodratUniversity of California, Los Angeles Verified email at cs.ucla.edu
Kemal EbciogluGlobal Supercomputing CorporationVerified email at acm.org
Debora DonatoPrincipal Data ScientistVerified email at acm.org

Alex Nicolau

Professor of Computer Science, University of California

Verified email at ics.uci.edu

Software Compilers Supercomputing EDA Parallel Processing


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EXPRESSION: A language for architecture exploration through compiler/simulator retargetability A Halambi, P Grun, V Ganesh, A Khare, N Dutt, A Nicolau Proceedings of the conference on Design, automation and test in Europe, 100-es, 1999	592	1999
SPARK: A high-level synthesis framework for applying parallelizing compiler transformations S Gupta, N Dutt, R Gupta, A Nicolau 16th International Conference on VLSI Design, 2003. Proceedings., 461-466, 2003	510	2003
Automatic program parallelization U Banerjee, R Eigenmann, A Nicolau, DA Padua Proceedings of the IEEE 81 (2), 211-243, 1993	509	1993
Efficient utilization of scratch-pad memory in embedded processor applications PR Panda, ND Dutt, A Nicolau Proceedings European Design and Test Conference. ED & TC 97, 7-11, 1997	410	1997
Optimal loop parallelization A Aiken, A Nicolau ACM SIGPLAN Notices 23 (7), 308-317, 1988	394	1988
Memory issues in embedded systems-on-chip: optimizations and exploration PR Panda, N Dutt, A Nicolau Kluwer Academic Publishers, 1999	347	1999
On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems PR Panda, ND Dutt, A Nicolau ACM Transactions on Design Automation of Electronic Systems (TODAES) 5 (3 …, 2000	344	2000
Parallelizing programs with recursive data structures LJ Hendren Cornell University, 1990	297	1990
A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors JM Nageswaran, N Dutt, JL Krichmar, A Nicolau, AV Veidenbaum Neural networks 22 (5-6), 791-800, 2009	282	2009
Perfect pipelining: A new loop parallelization technique A Aiken, A Nicolau ESOP'88, 221-235, 1988	269	1988
Measuring the parallelism available for very long instruction word architectures Nicolau IEEE Transactions on Computers 100 (11), 968-976, 1984	260	1984
SPARK: a parallelizing approach to the high-level synthesis of digital circuits S Gupta, R Gupta, ND Dutt, A Nicolau Springer Science & Business Media, 2007	229	2007
Partitioned register files for VLIWs: A preliminary analysis of tradeoffs A Capitanio, N Dutt, A Nicolau ACM SIGMICRO Newsletter 23 (1-2), 292-300, 1992	226	1992
Profile-based dynamic voltage scheduling using program checkpoints A Azevedo, I Issenin, R Cornea, R Gupta, N Dutt, A Veidenbaum, ... Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002	218	2002
Parallel processing: A smart compiler and a dumb machine JA Fisher, JR Ellis, JC Ruttenberg, A Nicolau Proceedings of the 1984 SIGPLAN symposium on Compiler construction, 37-47, 1984	216	1984
Underdesigned and opportunistic computing in presence of hardware variability P Gupta, Y Agarwal, L Dolecek, N Dutt, RK Gupta, R Kumar, S Mitra, ... IEEE Transactions on Computer-Aided Design of integrated circuits and …, 2012	201	2012
Adapting cache line size to application behavior AV Veidenbaum, W Tang, R Gupta, A Nicolau, X Ji Proceedings of the 13th international conference on Supercomputing, 145-154, 1999	201	1999
Coordinated parallelizing compiler optimizations and high-level synthesis S Gupta, RK Gupta, ND Dutt, A Nicolau ACM Transactions on Design Automation of Electronic Systems (TODAES) 9 (4 …, 2004	186*	2004
Percolation scheduling: A parallel compilation technique A Nicolau Cornell University, 1985	186	1985
Adaptive bitonic sorting: An optimal parallel algorithm for shared-memory machines G Bilardi, A Nicolau SIAM Journal on Computing 18 (2), 216-228, 1989	181	1989

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