| BEOL-Compatible Superlattice FEFET Analog Synapse With Improved Linearity and Symmetry of Weight Update KA Aabrar, SG Kirtania, FX Liang, J Gomez, M San Jose, Y Luo, H Ye, ... IEEE Transactions on Electron Devices 69 (4), 2094-2100, 2022 | 45 | 2022 |
| Antiferroelectric negative capacitance from a structural phase transition in zirconia M Hoffmann, Z Wang, N Tasneem, A Zubair, PV Ravindran, M Tian, ... Nature communications 13 (1), 1228, 2022 | 44 | 2022 |
| BEOL Compatible Superlattice FerroFET-based High Precision Analog Weight Cell with Superior Linearity and Symmetry KA Aabrar, J Gomez, SG Kirtania, M San Jose, Y Luo, PG Ravikumar, ... 2021 IEEE International Electron Devices Meeting (IEDM), 19.6. 1-19.6. 4, 2021 | 34 | 2021 |
| Experimental demonstration and modeling of a ferroelectric gate stack with a tunnel dielectric insert for NAND applications D Das, H Park, Z Wang, C Zhang, PV Ravindran, C Park, N Afroze, ... 2023 International Electron Devices Meeting (IEDM), 1-4, 2023 | 27 | 2023 |
| 2021 IEEE Int. Electron Devices Meeting (IEDM) KP O'Brien, CJ Dorow, A Penumatcha, K Maxey, S Lee, CH Naylor, ... IEEE, 2021 | 26* | 2021 |
| Why Do Ferroelectrics Exhibit Negative Capacitance? M Hoffmann, PV Ravindran, AI Khan Materials 12 (22), 3743, 2019 | 25 | 2019 |
| Machine Learning Assisted Statistical Variation Analysis of Ferroelectric Transistors: From Experimental Metrology to Predictive Modeling G Choe, PV Ravindran, A Lu, J Hur, M Lederer, A Reck, S Lombardo, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 15 | 2022 |
| A Ge-channel ferroelectric field effect transistor with logic-compatible write voltage D Das, PV Ravindran, C Park, N Tasneem, Z Wang, H Chen, W Chern, ... IEEE Electron Device Letters 44 (2), 257-260, 2022 | 13 | 2022 |
| Characterizing HfO2-Based Ferroelectric Tunnel Junction in Cryogenic Temperature J Hur, C Park, G Choe, PV Ravindran, AI Khan, S Yu IEEE Transactions on Electron Devices 69 (10), 5948-5951, 2022 | 12 | 2022 |
| Machine Learning-Assisted Statistical Variation Analysis of Ferroelectric Transistor: From Experimental Metrology to Adaptive Modeling G Choe, PV Ravindran, J Hur, M Lederer, A Reck, A Khan, S Yu IEEE Transactions on Electron Devices 70 (4), 2015-2020, 2023 | 9 | 2023 |
| Material choices for Tunnel Dielectric Layer and Gate Blocking Layer for Ferroelectric NAND Applications L Fernandes, PV Ravindran, T Song, D Das, C Park, N Afroze, M Tian, ... IEEE Electron Device Letters, 2024 | 8 | 2024 |
| Ferroelectric Gate Stack Engineering with Tunnel Dielectric Insert for Achieving High MemoryWindow in FEFETs for NAND Applications D Das, H Park, Z Wang, C Zhang, PV Ravindran, C Park, N Afroze, ... 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2024 | 5 | 2024 |
| A microscopic “toy” model of ferroelectric negative capacitance M Hoffmann, PV Ravindran, AI Khan 2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-4, 2020 | 4 | 2020 |
| Design Framework for Ferroelectric Gate Stack Engineering of Vertical NAND Structures for Efficient TLC and QLC Operation D Das, L Fernandes, PV Ravindran, T Song, C Park, N Afroze, M Tian, ... 2024 IEEE International Memory Workshop (IMW), 1-4, 2024 | 3 | 2024 |
| Differential charge boost in hysteretic ferroelectric–dielectric heterostructure capacitors at steady state N Tasneem, PV Ravindran, Z Wang, J Gomez, J Hur, S Yu, S Datta, ... Applied Physics Letters 118 (12), 2021 | 3 | 2021 |
| Conditions for Domain-Free Negative Capacitance PV Ravindran, PG Ravikumar, AI Khan IEEE Transactions on Electron Devices 70 (8), 4493-4496, 2023 | 2 | 2023 |
| Low-Frequency Noise Characteristics of BEOL-Compatible IWO Transistor YC Luo, H Ye, W Chakraborty, J Hur, PV Ravindran, AI Khan, S Datta, ... 2022 IEEE Silicon Nanoelectronics Workshop (SNW), 1-2, 2022 | 2 | 2022 |
| Disturb and its mitigation in Ferroelectric Field-Effect Transistors with Large Memory Window for NAND Flash Applications P Venkatesan, C Park, T Song, L Fernandes, D Das, N Afroze, ... IEEE Electron Device Letters, 2024 | 1 | 2024 |
| Plasma-Enhanced Atomic Layer Deposition Based Ferroelectric Field-Effect Transistors C Park, PV Ravindran, D Das, PG Ravikumar, C Zhang, N Afroze, ... IEEE Journal of the Electron Devices Society, 2024 | 1 | 2024 |
| Demonstration of Robust Retention in Band engineered FEFETs for NAND Storage Applications using Tunnel Dielectric Layer P Venkatesan, L Fernandes, P Ravikumar, C Park, H Tran, Z Wang, ... IEEE Electron Device Letters, 2024 | | 2024 |
Asif KhanAssociate Professor, ECE and MSE, Georgia TechVerified email at ece.gatech.edu
