| DIANA: An end-to-end energy-efficient digital and ANAlog hybrid neural network SoC K Ueyoshi, IA Papistas, P Houshmand, GM Sarda, V Jain, M Shi, Q Zheng, ... 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 71 | 2022 |
| Evolver: A deep learning processor with on-device quantization–voltage–frequency tuning F Tu, W Wu, Y Wang, H Chen, F Xiong, M Shi, N Li, J Deng, T Chen, L Liu, ... IEEE Journal of Solid-State Circuits 56 (2), 658-673, 2020 | 60 | 2020 |
| Diana: An end-to-end hybrid digital and analog neural network soc for the edge P Houshmand, GM Sarda, V Jain, K Ueyoshi, IA Papistas, M Shi, Q Zheng, ... IEEE Journal of Solid-State Circuits 58 (1), 203-215, 2022 | 49 | 2022 |
| A fast and power-efficient hardware architecture for non-maximum suppression M Shi, P Ouyang, S Yin, L Liu, S Wei IEEE Transactions on Circuits and Systems II: Express Briefs 66 (11), 1870-1874, 2019 | 31 | 2019 |
| STC: Significance-aware transform-based codec framework for external memory access reduction F Xiong, F Tu, M Shi, Y Wang, L Liu, S Wei, S Yin 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 16 | 2020 |
| ML processors are going multi-core: A performance dream or a scheduling nightmare? M Verhelst, M Shi, L Mei IEEE Solid-State Circuits Magazine 14 (4), 18-27, 2022 | 11 | 2022 |
| BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning Acceleration M Shi, V Jain, A Joseph, M Meijer, M Verhelst 2024 IEEE International Symposium on High-Performance Computer Architecture …, 2024 | 10 | 2024 |
| Hardware-efficient residual neural network execution in line-buffer depth-first processing M Shi, P Houshmand, L Mei, M Verhelst IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11 (4 …, 2021 | 10 | 2021 |
| COAC: Cross-layer optimization of accelerator configurability for efficient CNN processing S Colleman, M Shi, M Verhelst IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31 (7), 945-958, 2023 | 4 | 2023 |
| Cmds: Cross-layer dataflow optimization for dnn accelerators exploiting multi-bank memories M Shi, S Colleman, C VanDeMieroop, A Joseph, M Meijer, W Dehaene, ... 2023 24th International Symposium on Quality Electronic Design (ISQED), 1-8, 2023 | 4 | 2023 |
| Anda: Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format C Fang, M Shi, R Geens, A Symons, Z Wang, M Verhelst arXiv preprint arXiv:2411.15982, 2024 | | 2024 |
| Energy Cost Modelling for Optimizing Large Language Model Inference on Hardware Accelerators R Geens, M Shi, A Symons, C Fang, M Verhelst 2024 IEEE 37th International System-on-Chip Conference (SOCC), 1-6, 2024 | | 2024 |
