| Benchmarking at the frontier of hardware security: Lessons from logic locking B Tan, R Karri, N Limaye, A Sengupta, O Sinanoglu, MM Rahman, ... arXiv preprint arXiv:2006.06806, 2020 | 43 | 2020 |
| Does logic locking work with EDA tools? Z Han, M Yasin, J Rajendran 30th USENIX Security Symposium (USENIX Security 21), 1055--1072, 2021 | 35 | 2021 |
| FuncTeller: How Well Does eFPGA Hide Functionality? Z Han, M Shayan, A Dixit, M Shihab, Y Makris, JJV Rajendran 32nd USENIX Security Symposium (USENIX Security 23), 5809-5826, 2023 | 5 | 2023 |
| Multi-objective strategies for stripped-functionality logic locking Z Han, M Yasin, JJV Rajendran 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 3 | 2020 |
| STATION: State Encoding-Based Attack-Resilient Sequential Obfuscation Z Han, A Dixit, S Patnaik, J Rajendran IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 2 | 2024 |
| Information transmission and re-read by acousto-optic effect N YANG, Z HAN, M TIAN, K ZHAO, Z ZHANG, X TAO Physics Experimentation, 2017 | | 2017 |
| Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking MM Rahman, S Bhunia, A Orailoglu, Z Han, A Benedetti, L Brignone, ... | | |
Jeyavijayan (JV) RajendranAssociate Professor of Electrical and Computer Engineering, Texas A&M UniversityVerified email at tamu.edu