| Building complete heterogeneous Systems-on-Chip in C: From hardware accelerators to CPUs Q Si, S Shetty, B Carrion Schaefer Electronics 10 (14), 1746, 2021 | 5 | 2021 |
| Micro-architecture Tuning for Dynamic Frequency Scaling in Coarse-Grain Runtime Reconfigurable Arrays with Adaptive Clock Domain Support Q Si, I Rashid, BC Schafer 2021 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 212-217, 2021 | 3 | 2021 |
| Advice: Automatic design and optimization of behavioral application specific processors Q Si, B Carrion Schaefer Proceedings of the Great Lakes Symposium on VLSI 2023, 327-332, 2023 | 2 | 2023 |
| PEPA: performance enhancement of embedded processors through HW accelerator resource sharing Q Si, B Carrion Schaefer Proceedings of the Great Lakes Symposium on VLSI 2023, 23-28, 2023 | 2 | 2023 |
| Modernizing hardware circuits through high-level synthesis MI Rashid, Q Si, BC Schaefer 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 1739-1743, 2022 | 2 | 2022 |
| MOSAIC: maximizing resource sharing in behavioral application specific processors Q Si, BC Schafer Microprocessors and Microsystems 106, 105039, 2024 | 1 | 2024 |
| Optimizing behavioral near on-chip memory computing systems Q Si, BC Schafer 2022 IEEE 33rd International Conference on Application-specific Systems …, 2022 | 1 | 2022 |
| Design and Optimization of Behavioral Application Specific Processors Q Si | | 2023 |
| Application Specific Approximate Behavioral Processor Q Si, P Chowdhury, R Sreekumar, BC Schafer IEEE Transactions on Sustainable Computing 8 (2), 165-179, 2022 | | 2022 |
