| Extrinsic and intrinsic performance of vertical InAs nanowire MOSFETs on Si substrates KM Persson, M Berg, MB Borg, J Wu, S Johansson, J Svensson, ... IEEE Transactions on Electron Devices 60 (9), 2761-2767, 2013 | 76 | 2013 |
| Performance evaluation of III–V nanowire transistors K Jansson, E Lind, LE Wernersson IEEE Transactions on Electron Devices 59 (9), 2375-2382, 2012 | 53 | 2012 |
| Intrinsic performance of InAs nanowire capacitors K Jansson, E Lind, LE Wernersson IEEE Transactions on Electron Devices 61 (2), 452-459, 2013 | 13 | 2013 |
| RF Characterization of Vertical Wrap-Gated InAs/High-Nanowire Capacitors J Wu, K Jansson, AS Babadi, M Berg, E Lind, LE Wernersson IEEE Transactions on Electron Devices 63 (2), 584-589, 2015 | 12 | 2015 |
| Ballistic modeling of InAs nanowire transistors K Jansson, E Lind, LE Wernersson Solid-State Electronics 115, 47-53, 2016 | 5 | 2016 |
| InAs Nanowire Devices and Circuits K Jansson Series of licentiate and doctoral theses 2015, 2015 | 2 | 2015 |
| Low-frequency and radio-frequency CV characterization of epitaxially grown InAs/high-k vertical nanowire MOS gate stacks J Wu, K Jansson, AS Banadi, E Lind, LE Wernersson 2016 Compound Semiconductor Week (CSW)[Includes 28th International …, 2016 | | 2016 |
| Amplifier Design Using Vertical InAs Nanowire MOSFETs K Jansson, E Lind, LE Wernersson IEEE Transactions on Electron Devices 63 (6), 2353-2359, 2016 | | 2016 |
| InAs Nanowires for High Frequency Electronics KM Persson, S Johansson, M Berg, A Dey, K Jansson, M Borg, ... GigaHertz Symposium 2012, 2012 | | 2012 |
| Inverter circuits based on vertical InAs nanowire MOSFETs A Dey, M Berg, M Borg, S Gorji, K Jansson, S Johansson, E Lind, ... Swedish System-on-Chip Conference, SSoCC 2011, 2011 | | 2011 |
| Automated modelling and optimization of a ratioed logic inverter utilizing nanowire-based transistors K Jansson, M Berg | | 2009 |