| Design and implementation of 4-bit arithmetic logic unit using Quantum Dot Cellular Automata MG Waje, PK Dakhole 2013 3rd IEEE international advance computing conference (IACC), 1022-1029, 2013 | 59 | 2013 |
| Design and simulation of new XOR gate and code converters using Quantum Dot Cellular Automata with reduced number of wire crossings MG Waje, PK Dakhole 2014 International Conference on Circuits, Power and Computing Technologies …, 2014 | 36 | 2014 |
| Analysis of various approaches used for the implementation of QCA based full adder circuit MG Waje, PK Dakhole 2016 international conference on electrical, electronics, and optimization …, 2016 | 12 | 2016 |
| Design and simulation of single layered logic generator block using quantum dot cellular automata MG Waje, P Dakhole 2015 International Conference on Pervasive Computing (ICPC), 1-6, 2015 | 10 | 2015 |
| Implementation and performance analysis of single layered reversible parity generator and parity checker circuits using quantum dot cellular automata paradigm MG Waje, PK Dakhole 2015 International conference on control, instrumentation, communication and …, 2015 | 8 | 2015 |
| Design and implementation of quantum dot cellular automata based irreversible and reversible logic generator block MG Waje, P Dakhole IOP Conference Series: Materials Science and Engineering 225 (1), 012089, 2017 | 6 | 2017 |
| A comparative analysis of finfet based sram design V Kumbar, M Waje IJEER 10 (4), 1191-1198, 2022 | 5 | 2022 |
| Maximum Power Operation of a PV System Employing Zeta Converter with Modified P&O Algorithm K Joshi, V Raut, S Waghmare, M Waje, R Patil International Journal of Engineering Trends and Technology 70 (7), 348-354, 2022 | 4 | 2022 |
| Power-delay-area efficient design and implementation of Vedic multiplier using 14 nm finfet technology S Shetkar, M Waje ICCCE 2021: Proceedings of the 4th International Conference on …, 2022 | 4 | 2022 |
| Low power & Area Efficient 16 bit Carry Select Adder Based on Adiabatic Logic MA Kakde, MM Waje International journal of Engineering and Advanced Technology 2 (2), 2014 | 4 | 2014 |
| COMPARITIVE STUDY OF FINFET BASED MULTIPLIERS WITH DIFFERENT ADDER CIRCUITS S Shetkar, M Waje Solid State Technology 63 (1s), 249-259, 2020 | 3 | 2020 |
| Implementation of ripple carry adder using advanced multilayer three input XOR gate (TIEO) technique in QCA technology M Mahad, M Waje International Journal of Electronics and Communication Engineering and …, 2017 | 3 | 2017 |
| Performance Analysis of FinFET-Based Static Random Access Memory Design V Kumbar, M Waje 2022 International Conference on Smart Generation Computing, Communication …, 2022 | 2 | 2022 |
| Design and analysis of quantum dot cellular automata technology based reversible multifunction block WM Govindrao, KP Dakhole Proceedings of the International Conference on Data Engineering and …, 2017 | 2 | 2017 |
| COLOUR IMAGE PROCESSING USING MODIFIED QUATERNION NEURAL NETWORK SK Waghmare, RB Patil, MG Waje, KV Joshi, VP Raut, PC Shrivastava Journal of Pharmaceutical Negative Results, 4943-4949, 2022 | 1 | 2022 |
| IOT based automated fish tank Y Gaidhani, M Waje, M Kalbande, T Panse Intelligent Systems for Social Good: Theory and Practice, 175-183, 2022 | 1 | 2022 |
| Error Detection in Fault-Tolerant Reversible Circuit Using Fredkin Gates PK Kadbe, MG Waje ICCCE 2021: Proceedings of the 4th International Conference on …, 2022 | 1 | 2022 |
| Performance Analysis of Reversible Logic-Based Full Adder Using BSIM4 Model S Horke, M Waje, R Patil Computing in Engineering and Technology: Proceedings of ICCET 2019, 659-665, 2020 | 1 | 2020 |
| Irreversible logic based 2: 4 decoder SG Horke, M Waje 2017 International Conference on Inventive Computing and Informatics (ICICI …, 2017 | 1 | 2017 |
| Fpga Implementation of Dwt for Ecg Signal Pre-Processing A DESHMUKH, MRSM WAJE JournalNX 3 (06), 83-87, 2017 | 1 | 2017 |
Dr. Pravin DakholeProfessor, Electronics Engineering, Y. C. College of Engineering, NagpurVerified email at ycce.edu